Lluc Alvarez
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
22
Venues
12
Active years
2009–2025
Best venue rank
A*
Where they publish
Papers
22 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | DSD | FetchFlare: An Open-Source Strided Data Prefetcher for High-Performance Cache Hierarchies. | Golnaz Korkian, Neiel Leyva, Arnau Bigas, Noelia Oliete-Escun, Abbas Haghi, Alireza Monemi, Csar Fuguet, Lluc Alvarez |
| 2024 | HPCA | A Two Level Neural Approach Combining Off-Chip Prediction with Adaptive Prefetch Filtering. | Alexandre Valentin Jamet, Georgios Vavouliotis, Daniel A. Jimnez, Lluc Alvarez, Marc Casas |
| 2023 | ICPP | WFAsic: A High-Performance ASIC Accelerator for DNA Sequence Alignment on a RISC-V SoC. | Abbas Haghi, Lluc Alvarez, Jordi Fornt, Juan Miguel De Haro Ruiz, Roger Figueras, Max Doblas, Santiago Marco-Sola, Miquel Moret |
| 2023 | MICRO | OpenPiton Optimizations Towards High Performance Manycores. | Neiel Leyva, Alireza Monemi, Noelia Oliete-Escun, Guillem Lpez-Parads, Xabier Abancens, Jonathan Balkind, Enrique Vallejo, Miquel Moret, Lluc Alvarez |
| 2022 | MICRO | Page Size Aware Cache Prefetching. | Georgios Vavouliotis, Gino Chacon, Lluc Alvarez, Paul V. Gratz, Daniel A. Jimnez, Marc Casas |
| 2022 | SC | TD-NUCA: Runtime Driven Management of NUCA Caches in Task Dataflow Programming Models. | Paul Caheny, Lluc Alvarez, Marc Casas, Miquel Moret |
| 2021 | FPL | OpenCL-based FPGA Accelerator for Semi-Global Approximate String Matching Using Diagonal Bit-Vectors. | David Castells-Rufas, Santiago Marco-Sola, Quim Aguado-Puig, Antonio Espinosa-Morales, Juan Carlos Moure, Lluc Alvarez, Miquel Moret |
| 2021 | FPL | An FPGA Accelerator of the Wavefront Algorithm for Genomics Pairwise Alignment. | Abbas Haghi, Santiago Marco-Sola, Lluc Alvarez, Dionysios Diamantopoulos, Christoph Hagleitner, Miquel Moret |
| 2021 | ISCA | Exploiting Page Table Locality for Agile TLB Prefetching. | Georgios Vavouliotis, Lluc Alvarez, Vasileios Karakostas, Konstantinos Nikas, Nectarios Koziris, Daniel A. Jimnez, Marc Casas |
| 2021 | MICRO | Morrigan: A Composite Instruction TLB Prefetcher. | Georgios Vavouliotis, Lluc Alvarez, Boris Grot, Daniel A. Jimnez, Marc Casas |
| 2020 | FPL | A Hardware/Software Co-Design of K-mer Counting Using a CAPI-Enabled FPGA. | Abbas Haghi, Lluc Alvarez, Jord Polo, Dionysios Diamantopoulos, Christoph Hagleitner, Miquel Moret |
| 2020 | ICPR | The DeepHealth Toolkit: A Unified Framework to Boost Biomedical Applications. | Michele Cancilla, Laura Canalini, Federico Bolelli, Stefano Allegretti, Salvador Carrin, Roberto Paredes, Jon Ander Gmez, Simone Leo, Marco Enrico Piras, Luca Pireddu, Asaf Badouh, Santiago Marco-Sola, Lluc Alvarez, Miquel Moret, Costantino Grana |
| 2018 | HPCA | Architectural Support for Task Dependence Management with Flexible Software Scheduling. | Emilio Castillo, Lluc Alvarez, Miquel Moret, Marc Casas, Enrique Vallejo, Jos Luis Bosque, Ramn Beivide, Mateo Valero |
| 2018 | ICS | Runtime-Guided Management of Stacked DRAM Memories in Task Parallel Programs. | Lluc Alvarez, Marc Casas, Jess Labarta, Eduard Ayguad, Mateo Valero, Miquel Moret |
| 2018 | SC | Teaching HPC Systems and Parallel Programming with Small-Scale Clusters. | Lluc Alvarez, Eduard Ayguad, Filippo Mantovani |
| 2018 | SC | Peachy Parallel Assignments (EduHPC 2018). | Eduard Ayguad, Lluc Alvarez, Fabio Banchelli, Martin Burtscher, Arturo Gonzlez-Escribano, Julian Gutierrez, David A. Joiner, David R. Kaeli, Fritz Previlon, Eduardo Rodriguez-Gutiez, David P. Bunde |
| 2018 | SC | Runtime-assisted cache coherence deactivation in task parallel programs. | Paul Caheny, Lluc Alvarez, Mateo Valero, Miquel Moret, Marc Casas |
| 2015 | EuroPar | Runtime-Aware Architectures. | Marc Casas, Miquel Moret, Lluc Alvarez, Emilio Castillo, Dimitrios Chasapis, Timothy Hayes, Luc Jaulmes, Oscar Palomar, Osman S. Unsal, Adrin Cristal, Eduard Ayguad, Jess Labarta, Mateo Valero |
| 2015 | ISCA | Coherence protocol for transparent management of scratchpad memories in shared memory manycore architectures. | Lluc Alvarez, Llus Vilanova, Miquel Moret, Marc Casas, Marc Gonzlez, Xavier Martorell, Nacho Navarro, Eduard Ayguad, Mateo Valero |
| 2012 | SC | Hardware-software coherence protocol for the coexistence of caches and local memories. | Lluc Alvarez, Llus Vilanova, Marc Gonzlez, Xavier Martorell, Nacho Navarro, Eduard Ayguad |
| 2011 | HPDC | Design space exploration for aggressive core replication schemes in CMPs. | Lluc Alvarez, Ramon Bertran, Marc Gonzlez, Xavier Martorell, Nacho Navarro, Eduard Ayguad |
| 2009 | ISPASS | Cetra: A trace and analysis framework for the evaluation of Cell BE systems. | Julio Merino, Lluc Alvarez, Marisa Gil, Nacho Navarro |