Luc Rijnders
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
5
Active years
1989–2006
Best venue rank
A*
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2006 | FPL | System Level Architecture Exploration for Reconfigurable Systems On Chip. | Konstantinos Masselos, Kari Tiensyrj, Yang Qu, Nikolaos S. Voros, Miroslav Cupk, Luc Rijnders, Marko Pettissalo |
| 2003 | SCOPES | Performance Analysis for Identification of (Sub-)Task-Level Parallelism in Java. | Richard Stahl, Robert Pasko, Luc Rijnders, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, Francky Catthoor |
| 2000 | RSP | A Hardware Virtual Machine for the Networked Reconfiguration. | Yajun Ha, Patrick Schaumont, Marc Engels, Serge Vernalde, Freddy Potargent, Luc Rijnders, Hugo De Man |
| 1999 | DATE | A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement. | Radim Cmar, Luc Rijnders, Patrick Schaumont, Serge Vernalde, Ivo Bolsens |
| 1998 | DAC | A Programming Environment for the Design of Complex High Speed ASICs. | Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens |
| 1997 | DATE | Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications. | Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens |
| 1989 | DAC | REDUSA: Module Generation by Automatic Elimination of Superfluous Blocks in Regular Structures. | I. Vandeweerd, Kris Croes, Luc Rijnders, Paul Six, Hugo De Man |