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Luis A. Plana

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

29

Venues

16

Active years

1996–2018

Best venue rank

A*

Where they publish

Papers

29 indexed papers, newest first.

YearVenueTitleAuthors
2018ISCASPerformance Comparison of Time-Step-Driven versus Event-Driven Neural State Update Approaches in SpiNNaker.Amirreza Yousefzadeh, Mikel Soto, Teresa Serrano-Gotarredona, Francesco Galluppi, Luis A. Plana, Steve B. Furber, Bernab Linares-Barranco
2017FPLAsynchronous interface FIFO design on FPGA for high-throughput NRZ synchronisation.Gengting Liu, Jim D. Garside, Steve B. Furber, Luis A. Plana, Dirk Koch
2017ISCASLive demonstration: Dynamic voltage and frequency scaling for neuromorphic many-core systems.Sebastian Hppner, Yexin Yan, Bernhard Vogginger, Andreas Dixius, Johannes Partzsch, Prateek Joshi, Felix Neumrker, Stephan Hartmann, Stefan Schiefer, Stefan Scholze, Georg Ellguth, Love Cederstroem, Matthias Eberlein, Christian Mayr, Steve Temple, Luis A. Plana, Jim D. Garside, Simon Davidson, David R. Lester, Steve B. Furber
2017ISCASDynamic voltage and frequency scaling for neuromorphic many-core systems.Sebastian Hppner, Yexin Yan, Bernhard Vogginger, Andreas Dixius, Johannes Partzsch, Felix Neumrker, Stephan Hartmann, Stefan Schiefer, Stefan Scholze, Georg Ellguth, Love Cederstroem, Matthias Eberlein, Christian Mayr, Steve Temple, Luis A. Plana, Jim D. Garside, Simon Davidson, David R. Lester, Steve B. Furber
2017ISCASLive demonstration: Multiplexing AER asynchronous channels over LVDS links with flow-control and clock-correction for scalable neuromorphic systems.Amirreza Yousefzadeh, Miroslaw Jablonski, Taras Iakymchuk, Alejandro Linares-Barranco, Alfredo Rosado Muoz, Luis A. Plana, Teresa Serrano-Gotarredona, Steve B. Furber, Bernab Linares-Barranco
2017ISCASMultiplexing AER asynchronous channels over LVDS links with flow-control and clock-correction for scalable neuromorphic systems.Amirreza Yousefzadeh, Miroslaw Jablonski, Taras Iakymchuk, Alejandro Linares-Barranco, Alfredo Rosado Muoz, Luis A. Plana, Teresa Serrano-Gotarredona, Stephen B. Furber, Bernab Linares-Barranco
2016IPCCCHigh performance computing on SpiNNaker neuromorphic platform: A case study for energy efficient image processing.Indar Sugiarto, Gengting Liu, Simon Davidson, Luis A. Plana, Steve B. Furber
2015FCCMAccelerating Interconnect Analysis Using High-Level HDLs and FPGA, SpiNNaker as a Case Study.Mohsen Ghasempour, Jonathan Heathcote, Javier Navaridas, Luis A. Plana, Jim D. Garside, Mikel Lujn
2015ISCASConvNets experiments on SpiNNaker.Teresa Serrano-Gotarredona, Bernab Linares-Barranco, Francesco Galluppi, Luis A. Plana, Stephen B. Furber
2014ICRAEvent-based neural computing on an autonomous mobile platform.Francesco Galluppi, Christian Denk, Matthias C. Meiner, Terrence C. Stewart, Luis A. Plana, Chris Eliasmith, Stephen B. Furber, Jrg Conradt
2013ICANNReal-Time Interface Board for Closed-Loop Robotic Tasks on the SpiNNaker Neural Computing System.Christian Denk, Francisco Llobet-Blandino, Francesco Galluppi, Luis A. Plana, Steve B. Furber, Jrg Conradt
2013IJCNNA location-independent direct link neuromorphic interface.Alexander D. Rast, Johannes Partzsch, Christian Mayr, Johannes Schemmel, Stefan Hartmann, Luis A. Plana, Steve Temple, David R. Lester, Ren Schffny, Steve B. Furber
2012HPCCAnalytical Assessment of the Suitability of Multicast Communications for the SpiNNaker Neuromimetic System.Javier Navaridas, Mikel Lujn, Luis A. Plana, Jos Miguel-Alonso, Stephen B. Furber
2012IJCNNEvent-driven MLP implementation on neuromimetic hardware.Alexander D. Rast, Luis A. Plana, Stephen R. Welbourne, Stephen B. Furber
2011ICONIPEvent-Driven Simulation of Arbitrary Spiking Neural Networks on SpiNNaker.Thomas Sharp, Luis A. Plana, Francesco Galluppi, Steve B. Furber
2011IJCNNAn event-driven model for the SpiNNaker virtual synaptic channel.Alexander D. Rast, Francesco Galluppi, Sergio Davies, Luis A. Plana, Thomas Sharp, Steve B. Furber
2010DSDDescription-Level Optimisation of Synthesisable Asynchronous Circuits.Luis A. Tarazona, Doug A. Edwards, Andrew Bardsley, Luis A. Plana
2010ISPDCAlgorithm for Mapping Multilayer BP Networks onto the SpiNNaker Neuromorphic Hardware.Xin Jin, Mikel Lujn, Muhammad Mukaram Khan, Luis A. Plana, Alexander D. Rast, Stephen R. Welbourne, Stephen B. Furber
2009DSDA Synthesisable Quasi-Delay Insensitive Result Forwarding Unit for an Asynchronous Processor.Luis A. Tarazona, Doug A. Edwards, Luis A. Plana
2009IJCNNA universal abstract-time platform for real-time neural networks.Alexander D. Rast, Mukaram M. Khan, Xin Jin, Luis A. Plana, Steve B. Furber
2009ICSUnderstanding the interconnection network of SpiNNaker.Javier Navaridas, Mikel Lujn, Jos Miguel-Alonso, Luis A. Plana, Steve B. Furber
2009ISPDCEvent-Driven Configuration of a Neural Network CMP System over a Homogeneous Interconnect Fabric.Muhammad Mukaram Khan, Javier Navaridas, Alexander D. Rast, Xin Jin, Luis A. Plana, Mikel Lujn, John V. Woods, Jos Miguel-Alonso, Steve B. Furber
2008ICONIPSpiNNaker: The Design Automation Problem.Andrew D. Brown, David R. Lester, Luis A. Plana, Steve B. Furber, Peter R. Wilson
2008IJCNNSpiNNaker: Mapping neural networks onto a massively-parallel chip multiprocessor.Muhammad Mukaram Khan, David R. Lester, Luis A. Plana, Alexander D. Rast, Xin Jin, Eustace Painkras, Stephen B. Furber
2007CASESPerformance-driven syntax-directed synthesis of asynchronous processors.Luis A. Plana, Doug A. Edwards, Sam Taylor, Luis A. Tarazona, Andrew Bardsley
2005ICCDAttacking Control Overhead to Improve Synthesised Asynchronous Circuit Performance.Luis A. Plana, Sam Taylor, Doug A. Edwards
2004DATEThe Design and Test of a Smartcard Chip Using a CHAIN Self-Timed Network-on-Chip.W. J. Bainbridge, Luis A. Plana, Stephen B. Furber
1998ICCDPulse-mode macromodular systems.Luis A. Plana, Stephen H. Unger
1996ISLPEDConcurrency-oriented optimization for low-power asynchronous systems.Luis A. Plana, Steven M. Nowick