Luis Entrena-Arrontes
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
4
Active years
2005–2006
Best venue rank
C
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2006 | DDECS | An Extension of Transient Fault Emulation Techniques to Circuits with Embedded Memories. | Mario Garca-Valderas, Marta Portela-Garca, Celia Lpez-Ongil, Luis Entrena-Arrontes |
| 2005 | DATE | Techniques for Fast Transient Fault Grading Based on Autonomous Emulation. | Celia Lpez-Ongil, Mario Garca-Valderas, Marta Portela-Garca, Luis Entrena-Arrontes |
| 2005 | FPL | An Autonomous FPGA-based Emulation System for Fast Fault Tolerant Evaluation. | Celia Lpez-Ongil, Mario Garca-Valderas, Marta Portela-Garca, Luis Entrena-Arrontes |
| 2005 | IOLTS | Autonomous Transient Fault Emulation on FPGAs for Accelerating Fault Grading. | Celia Lpez-Ongil, Mario Garca-Valderas, Marta Portela-Garca, Luis Entrena-Arrontes |