Mahesh B. Patil
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
4
Active years
2003–2013
Best venue rank
National
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2013 | EDUCON | An approach to complement electronics courses using virtual environment. | Jinu Jayachandran, Nina Joseph, Maheshwar Mangat, Vinay Verma, N. P. Narendra, Aniruddha Shastri, Devendra Patil, Madhumita Date, Joseph John, Mahesh B. Patil |
| 2009 | ASPDAC | Automated design and optimization of circuits in emerging technologies. | Rajesh Amratlal Thakker, Chaitanya Sathe, Angada B. Sachid, Maryam Shojaei Baghini, V. Ramgopal Rao, Mahesh B. Patil |
| 2009 | ISCAS | Bridging Technology-CAD and Design-CAD for Variability Aware Nano-CMOS Circuits. | B. P. Harish, Navakanta Bhat, Mahesh B. Patil |
| 2009 | VLSID | Low-Power Low-Voltage Analog Circuit Design Using Hierarchical Particle Swarm Optimization. | Rajesh Amratlal Thakker, Maryam Shojaei Baghini, Mahesh B. Patil |
| 2006 | VLSID | Evaluation of Non-Quasi-Static Effects during SEU in Deep-Submicron MOS Devices and Circuits. | Palkesh Jain, D. Vinay Kumar, J. M. Vasi, Mahesh B. Patil |
| 2003 | VLSID | Application of Look-up Table Approach to High-K Gate Dielectric MOS Transistor circuits. | D. Vinay Kumar, Nihar R. Mohapatra, Mahesh B. Patil, V. Ramgopal Rao |