Mahesh Ketkar
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
12
Venues
9
Active years
2000–2025
Best venue rank
A*
Where they publish
Papers
12 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | DATE | SPIRE: Inferring Hardware Bottlenecks from Performance Counter Data. | Nicholas Wendt, Mahesh Ketkar, Valeria Bertacco |
| 2025 | SIGCOMM | Understanding and Profiling CXL.mem Using PathFinder. | Xiao Li, Zerui Guo, Yuebin Bai, Mahesh Ketkar, Hugh Wilkinson, Ming Liu |
| 2024 | ISPASS | Aiding Microprocessor Performance Validation with Machine Learning. | Erick Carvajal Barboza, Mahesh Ketkar, Paul Gratz, Jiang Hu |
| 2023 | ASPLOS | Ditto: End-to-End Application Cloning for Networked Cloud Services. | Mingyu Liang, Yu Gan, Yueying Li, Carlos Torres, Abhishek Dhanotia, Mahesh Ketkar, Christina Delimitrou |
| 2023 | ISPASS | MQL: ML-Assisted Queuing Latency Analysis for Data Center Networks. | Shruti Yadav Narayana, Jie Tong, Anish Krishnakumar, Nuriye Yildirim, Emily Shriver, Mahesh Ketkar, mit Y. Ogras |
| 2021 | HPCA | Automatic Microprocessor Performance Bug Detection. | Erick Carvajal Barboza, Sara Jacob, Mahesh Ketkar, Michael Kishinevsky, Paul Gratz, Jiang Hu |
| 2019 | ICSE | PerfProbe: a systematic, cross-layer performance diagnosis framework for mobile platforms. | David Ke Hong, Ashkan Nikravesh, Z. Morley Mao, Mahesh Ketkar, Michael Kishinevsky |
| 2009 | MICRO | A microarchitecture-based framework for pre- and post-silicon power delivery analysis. | Mahesh Ketkar, Eli Chiprout |
| 2007 | DAC | Comparative Analysis of Conventional and Statistical Design Techniques. | Steven M. Burns, Mahesh Ketkar, Noel Menezes, Keith A. Bowman, James W. Tschanz, Vivek De |
| 2007 | DAC | Gate Sizing For Cell Library-Based Designs. | Shiyan Hu, Mahesh Ketkar, Jiang Hu |
| 2002 | ICCAD | Standby power optimization via transistor sizing and dual threshold voltage assignment. | Mahesh Ketkar, Sachin S. Sapatnekar |
| 2000 | DAC | Convex delay models for transistor sizing. | Mahesh Ketkar, Kishore Kasamsetty, Sachin S. Sapatnekar |