| 2022 | ASPDAC | Anti-Piracy of Analog and Mixed-Signal Circuits in FD-SOI. | Mariam Tlili, Alhassan Sayed, Doaa Mahmoud, Marie-Minerve Lourat, Hassan Aboushady, Haralampos-G. Stratigopoulos |
| 2022 | VTS | Run-Time Hardware Trojan Detection in Analog and Mixed-Signal ICs. | Antonios Pavlidis, Eric Faehn, Marie-Minerve Lourat, Haralampos-G. Stratigopoulos |
| 2021 | ASPDAC | Breaking Analog Biasing Locking Techniques via Re-Synthesis. | Julian Leonhard, Mohamed Elshamy, Marie-Minerve Lourat, Haralampos-G. D. Stratigopoulos |
| 2021 | ETS | BIST-Assisted Analog Fault Diagnosis. | Antonios Pavlidis, Eric Faehn, Marie-Minerve Lourat, Haralampos-G. Stratigopoulos |
| 2020 | DATE | Securing Programmable Analog ICs Against Piracy. | Mohamed Elshamy, Alhassan Sayed, Marie-Minerve Lourat, Amine Rhouni, Hassan Aboushady, Haralampos-G. D. Stratigopoulos |
| 2020 | DATE | Symmetry-based A/M-S BIST (SymBIST): Demonstration on a SAR ADC IP. | Antonios Pavlidis, Marie-Minerve Lourat, Eric Faehn, Anand Kumar, Haralampos-G. D. Stratigopoulos |
| 2020 | ETS | Hardware Trojan Attacks in Analog/Mixed-Signal ICs via the Test Access Mechanism. | Mohamed Elshamy, Giorgio Di Natale, Antonios Pavlidis, Marie-Minerve Lourat, Haralampos-G. D. Stratigopoulos |
| 2020 | FDL | Virtual Prototyping of Open Source Heterogeneous Systems with an Open Source Framework Featuring SystemC MDVP Extensions. | Franois Pcheux, Liliana Andrade, Marie-Minerve Lourat, Ilias Bournias, Roselyne Chotin, Daniela Genius |
| 2019 | DATE | MixLock: Securing Mixed-Signal Circuits via Logic Locking. | Julian Leonhard, Muhammad Yasin, Shadi Turk, Mohammed Thari Nabeel, Marie-Minerve Lourat, Roselyne Chotin-Avot, Hassan Aboushady, Ozgur Sinanoglu, Haralampos-G. D. Stratigopoulos |
| 2019 | ISCAS | Design of a 4th-Order Feed-Forward-Compensated Operational Amplifier for Multi-GHz Sampling Frequency Continuous-Time Bandpass Sigma-Delta Modulators. | Fikre Tsigabu Gebreyohannes, Marie-Minerve Lourat, Hassan Aboushady |
| 2018 | ISCAS | Open Source Hardware and EDA Tools for Analog/Mixed-Signal Design and Prototyping. | Naohiko Shimizu, Junichi Akita, Marie-Minerve Lourat, Haralampos-G. D. Stratigopoulos, Jean-Paul Chaput, Dimitri Galayko |
| 2016 | ISCAS | Mixed-signal PI controller in current-mode DC-DC buck converter for automotive applications. | Yasser Moursy, Raouf Khalil, Sergio Lecce, Vanni Poletto, Ramy Iskander, Marie-Minerve Lourat |
| 2016 | ISCAS | An adaptive mesh refinement strategy of substrate modeling for smart power ICs. | Hao Zou, Yasser Moursy, Ramy Iskander, Jean-Paul Chaput, Marie-Minerve Lourat |
| 2015 | DATE | Pre-simulation symbolic analysis of synchronization issues between discrete event and timed data flow models of computation. | Liliana Andrade, Torsten Maehne, Alain Vachoux, Cdric Ben Aoun, Franois Pcheux, Marie-Minerve Lourat |
| 2015 | ISCAS | 1.1-V 200 MS/s 12-bit digitally calibrated pipeline ADC in 40 nm CMOS. | Hussein Adel, Marc Sabut, Marie-Minerve Lourat |
| 2014 | ISCAS | Split ADC digital background calibration for high speed SHA-less pipeline ADCs. | Hussein Adel, Marc Sabut, Roger Petigny, Marie-Minerve Lourat |
| 2013 | ISCAS | A structured DC analysis methodology for accurate verification of analog circuits. | Farakh Javid, Ramy Iskander, Marie-Minerve Lourat, Franois Durbin |
| 2012 | DATE | Holistic modeling of embedded systems with multi-discipline feedback: Application to a Precollision Mitigation Braking System. | Antoine Lvque, Franois Pcheux, Marie-Minerve Lourat, Hassan Aboushady, Fabio Cenni, Serge Scotti, Abdelbasset Massouri, Laurent Clavier |
| 2012 | FDL | A unified platform for design and verification of mixed-signal systems based on SystemC AMS. | Yao Li, Ramy Iskander, Farakh Javid, Marie-Minerve Lourat |
| 2012 | FDL | A Design and Verification Methodology for Mixed-Signal Systems Using SystemC-AMS. | Yao Li, Ramy Iskander, Farakh Javid, Marie-Minerve Lourat |
| 2010 | ISCAS | Foreground digital calibration of non-linear errors in pipelined A/D converters. | Hussein Adel, Mohamed Dessouky, Marie-Minerve Lourat, Hugo Gicquel, Hisham Haddara |
| 2010 | ISCAS | Systematic design of continuous-time ΣΔ modulator with VCO-based quantizer. | Wagdy M. Gaber, Mootaz Allam, Hassan Aboushady, Marie-Minerve Lourat, El-Sayed Eid |
| 2009 | ISCAS | Automatic Model Refinement of GmC Integrators for High-level Simulation of Continuous-time Sigma-Delta Modulators. | Michel Vasilevski, Hassan Aboushady, Marie-Minerve Lourat |
| 2004 | DATE | Automatic Synthesis and Simulation of Continuous-Time [Sigma-Delta] Modulators. | Hassan Aboushady, Laurent de Lamarre, Nicolas Beilleau, Marie-Minerve Lourat |
| 2004 | FDL | A language to desing generators of analog functions (poster). | Marie-Minerve Lourat, Tuong P. Nguyen, Vincent Bourguet, Laurent de Lamarre, Alain Greiner |
| 2004 | ISCAS | Loop delay compensation in bandpass continuous-time Sigma Delta modulators without additional feedback coefficients. | Hassan Aboushady, Marie-Minerve Lourat |
| 2002 | ISCAS | Systematic approach for discrete-time to continuous-time transformation of Sigma-Delta modulators. | Hassan Aboushady, Marie-Minerve Lourat |
| 2001 | DATE | Analog design for reuse - case study: very low-voltage sigma-delta modulator. | Mohamed Dessouky, Andreas Kaiser, Marie-Minerve Lourat, Alain Greiner |
| 2001 | ISCAS | Low-power design of low-voltage current-mode integrators for continuous-time Sigma-Delta modulators. | Hassan Aboushady, Marie-Minerve Lourat |
| 2000 | DATE | Layout-Oriented Synthesis of High Performance Analog Circuits. | Mohamed Dessouky, Marie-Minerve Lourat, Jacky Porte |