Massimo Ruo Roch
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
9
Venues
6
Active years
2000–2024
Best venue rank
C
Where they publish
Papers
9 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2024 | EDUCON | VirtLAB-UI: An Open, Platform Independent, Software and Firmware Solution for Remote and Take-Home Labs. | Massimo Ruo Roch, Maurizio Martina |
| 2022 | ICIP | NLCMAP: A Framework for the Efficient Mapping of Non-Linear Convolutional Neural Networks on FPGA Accelerators. | Giuseppe Aiello, Beatrice Bussolino, Emanuele Valpreda, Massimo Ruo Roch, Guido Masera, Maurizio Martina, Stefano Marsi |
| 2018 | EDUCON | MECA, the microelectronics cloud alliance. | Massimo Ruo Roch, Danilo Demarchi, Martin Klossek, Slavka Tzanova |
| 2017 | EDUCON | Work-in-progress: MicroElectronics Cloud Alliance. | Slavka Tzanova, Danilo Demarchi, Massimo Ruo Roch |
| 2014 | PDP | Rediscovering Logarithmic Diameter Topologies for Low Latency Network-on-Chip-Based Applications. | Carlo Condo, Maurizio Martina, Massimo Ruo Roch, Guido Masera |
| 2014 | VTS | Fault tolerant nanoarray circuits: Automatic design and verification. | Pasquale Ranone, Giovanna Turvani, Fabrizio Riente, Mariagrazia Graziano, Massimo Ruo Roch, Maurizio Zamboni |
| 2010 | DATE | MEDEA: a hybrid shared-memory/message-passing multiprocessor NoC-based architecture. | Sergio Tota, Mario R. Casu, Massimo Ruo Roch, Luca Rostagno, Maurizio Zamboni |
| 2000 | DATE | A 50 Mbit/s Iterative Turbo-Decoder. | Fabrizio Viglione, Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni |
| 2000 | ISCAS | A high accuracy-low complexity model for CMOS delays. | Mario Roberto Casu, Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni |