| 2023 | ASPDAC | EDDY: A Multi-Core BDD Package with Dynamic Memory Management and Reduced Fragmentation. | Rune Krauss, Mehran Goli, Rolf Drechsler |
| 2023 | ASPDAC | Trojan-D2: Post-Layout Design and Detection of Stealthy Hardware Trojans - A RISC-V Case Study. | Sajjad Parvin, Mehran Goli, Frank Sill Torres, Rolf Drechsler |
| 2023 | DATE | FELOPi: A Framework for Simulation and Evaluation of Post-Layout File Against Optical Probing. | Sajjad Parvin, Mehran Goli, Frank Sill Torres, Rolf Drechsler |
| 2023 | DDECS | Efficient Binary Decision Diagram Manipulation by Reducing the Number of Intermediate Nodes. | Rune Krauss, Mehran Goli, Rolf Drechsler |
| 2023 | DSD | Efficient ML-Based Performance Estimation Approach Across Different Microarchitectures for RISC-V Processors. | Weiyan Zhang, Mehran Goli, Muhammad Hassan, Rolf Drechsler |
| 2022 | DDECS | Towards Polynomial Formal Verification of Complex Arithmetic Circuits. | Rolf Drechsler, Alireza Mahzoon, Mehran Goli |
| 2022 | DDECS | ML-based Power Estimation of Convolutional Neural Networks on GPGPUs. | Christopher A. Metz, Mehran Goli, Rolf Drechsler |
| 2022 | DDECS | Early Performance Estimation of Embedded Software on RISC-V Processor using Linear Regression. | Weiyan Zhang, Mehran Goli, Rolf Drechsler |
| 2022 | RSP | ANN-based Performance Estimation of Embedded Software for RISC-V Processors. | Weiyan Zhang, Mehran Goli, Alireza Mahzoon, Rolf Drechsler |
| 2021 | ASPDAC | ATLaS: Automatic Detection of Timing-based Information Leakage Flows for SystemC HLS Designs. | Mehran Goli, Rolf Drechsler |
| 2021 | DSD | Automated Debugging-Aware Visualization Technique for SystemC HLS Designs. | Mehran Goli, Alireza Mahzoon, Rolf Drechsler |
| 2021 | FDL | VIP-VP: Early Validation of SoCs Information Flow Policies using SystemC-based Virtual Prototypes. | Mehran Goli, Rolf Drechsler |
| 2021 | ICCAD | Early Validation of SoCs Security Architecture Against Timing Flows Using SystemC-based VPs. | Mehran Goli, Rolf Drechsler |
| 2020 | DDECS | Towards Generation of a Programmable Power Management Unit at the Electronic System Level. | David Lemma, Mehran Goli, Daniel Groe, Rolf Drechsler |
| 2020 | ICCD | ASCHyRO: Automatic Fault Localization of SystemC HLS Designs Using a Hybrid Accurate Rank Ordering Technique. | Mehran Goli, Alireza Mahzoon, Rolf Drechsler |
| 2019 | DSD | Scalable Simulation-Based Verification of SystemC-Based Virtual Prototypes. | Mehran Goli, Rolf Drechsler |
| 2018 | RSP | Resilience Evaluation for Approximating SystemC Designs Using Machine Learning Techniques. | Mehran Goli, Jannis Stoppe, Rolf Drechsler |
| 2017 | DATE | Automatic equivalence checking for SystemC-TLM 2.0 models against their formal specifications. | Mehran Goli, Jannis Stoppe, Rolf Drechsler |
| 2017 | ICCD | Automatic Protocol Compliance Checking of SystemC TLM-2.0 Simulation Behavior Using Timed Automata. | Mehran Goli, Jannis Stoppe, Rolf Drechsler |
| 2016 | ICCD | AIBA: An Automated Intra-cycle Behavioral Analysis for SystemC-based design exploration. | Mehran Goli, Jannis Stoppe, Rolf Drechsler |
| 2014 | VLSID | Embedded Complex Floating Point Hardware Accelerator. | Amin Ghasemazar, Mehran Goli, Ali Afzali-Kusha |