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Michael Adler

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

14

Venues

7

Active years

2008–2017

Best venue rank

A*

Where they publish

Papers

14 indexed papers, newest first.

YearVenueTitleAuthors
2017FPGAAutomatic Construction of Program-Optimized FPGA Memory Networks.Hsin-Jung Yang, Kermin Fleming, Felix Winterstein, Annie I. Chen, Michael Adler, Joel S. Emer
2016FPGALMC: Automatic Resource-Aware Program-Optimized Memory Partitioning.Hsin-Jung Yang, Kermin Fleming, Michael Adler, Felix Winterstein, Joel S. Emer
2015FPGAGrowing a Healthy FPGA Ecosystem.John Lockwood, Michael Adler, Dan Mansur, Derek Chiou, Mike Strickland, Jason Cong, Steve Teig
2015FPLScavenger: Automating the construction of application-optimized memory hierarchies.Hsin-Jung Yang, Kermin Fleming, Michael Adler, Felix Winterstein, Joel S. Emer
2014FCCMLEAP Shared Memories: Automating the Construction of FPGA Coherent Memories.Hsin-Jung Yang, Kermin Fleming, Michael Adler, Joel S. Emer
2014FPLThe LEAP FPGA operating system.Kermin Fleming, Hsin-Jung Yang, Michael Adler, Joel S. Emer
2013FPLOptimizing under abstraction: Using prefetching to improve FPGA performance.Hsin-Jung Yang, Kermin Fleming, Michael Adler, Joel S. Emer
2013ISCATriggered instructions: a control paradigm for spatially-programmed architectures.Angshuman Parashar, Michael Pellauer, Michael Adler, Bushra Ahsan, Neal Clayton Crago, Daniel Lustig, Vladimir Pavlov, Antonia Zhai, Mohit Gambhir, Aamer Jaleel, Randy L. Allmon, Rachid Rayess, Stephen Maresh, Joel S. Emer
2012FPGALeveraging latency-insensitivity to ease multiple FPGA design.Kermin Elliott Fleming, Michael Adler, Michael Pellauer, Angshuman Parashar, Arvind, Joel S. Emer
2011FPGALeap scratchpads: automatic memory and cache management for reconfigurable logic.Michael Adler, Kermin Fleming, Angshuman Parashar, Michael Pellauer, Joel S. Emer
2011HPCAHAsim: FPGA-based high-detail multicore simulation using time-division multiplexing.Michael Pellauer, Michael Adler, Michel A. Kinsy, Angshuman Parashar, Joel S. Emer
2009DACSoft connections: addressing the hardware-design modularity problem.Michael Pellauer, Michael Adler, Derek Chiou, Joel S. Emer
2008FPGAA-Ports: an efficient abstraction for cycle-accurate performance models on FPGAs.Michael Pellauer, Muralidaran Vijayaraghavan, Michael Adler, Arvind, Joel S. Emer
2008ISPASSQuick Performance Models Quickly: Closely-Coupled Partitioned Simulation on FPGAs.Michael Pellauer, Muralidaran Vijayaraghavan, Michael Adler, Arvind, Joel S. Emer