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Michael D. Hutton

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

10

Venues

8

Active years

1991–2006

Best venue rank

A*

Where they publish

Papers

10 indexed papers, newest first.

YearVenueTitleAuthors
2006ASPDACEfficient static timing analysis using a unified framework for false paths and multi-cycle paths.Shuo Zhou, Bo Yao, Hongyu Chen, Yi Zhu, Chung-Kuan Cheng, Michael D. Hutton
2006DATEA methodology for FPGA to structured-ASIC synthesis and verification.Michael D. Hutton, Richard Yuan, Jay Schleicher, Gregg Baeckler, Sammy Cheung, Kar Keng Chua, Hee Kong Phoo
2005ICCADImproving the efficiency of static timing analysis with false paths.Shuo Zhou, Bo Yao, Hongyu Chen, Yi Zhu, Chung-Kuan Cheng, Michael D. Hutton, Truman Collins, Sridhar Srinivasan, Nan-Chi Chou, Peter Suaris
2004FPLImproving FPGA Performance and Area Using an Adaptive Logic Module.Michael D. Hutton, Jay Schleicher, David M. Lewis, Bruce Pedersen, Richard Yuan, Sinan Kaptanoglu, Gregg Baeckler, Boris Ratchev, Ketan Padalia, Mark Bourgeault, Andy Lee, Henry Kim, Rahul Saini
2002FPGAInterconnect enhancements for a high-speed PLD architecture.Michael D. Hutton, Vinson Chan, Peter Kazarian, Victor Maruri, Tony Ngai, Jim Park, Rakesh H. Patel, Bruce Pedersen, Jay Schleicher, Sergey Y. Shumarayev
1999ISCASEquivalence classes of clone circuits for physical-design benchmarking.Michael D. Hutton, Jonathan Rose
1999ISCASApplications of clone circuits to issues in physical-design.Michael D. Hutton, Jonathan Rose
1997FPGAGeneration of Synthetic Sequential Benchmark Circuits.Michael D. Hutton, Jonathan Rose, Derek G. Corneil
1996DACCharacterization and Parameterized Random Generation of Digital Circuits.Michael D. Hutton, Jerry P. Grossman, Jonathan Rose, Derek G. Corneil
1991SODAUpward Planar Drawing of Single Source Acyclic Digraphs.Michael D. Hutton, Anna Lubiw