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Michael D. Powell

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

16

Venues

5

Active years

2000–2011

Best venue rank

A*

Where they publish

Papers

16 indexed papers, newest first.

YearVenueTitleAuthors
2011HPCAAchieving uniform performance and maximizing throughput in the presence of heterogeneity.Krishna K. Rangan, Michael D. Powell, Gu-Yeon Wei, David M. Brooks
2009HPCACAMP: A technique to estimate per-structure power at run-time using a few simple parameters.Michael D. Powell, Arijit Biswas, Joel S. Emer, Shubhendu S. Mukherjee, Basit Riaz Sheikh, Shrirang M. Yardi
2009ISCAArchitectural core salvaging in a multi-core processor for hard-error tolerance.Michael D. Powell, Arijit Biswas, Shantanu Gupta, Shubhendu S. Mukherjee
2007ISLPEDResource area dilation to reduce power density in throughput servers.Michael D. Powell, T. N. Vijaykumar
2005ISCAOptimizing Replication, Communication, and Capacity Allocation in CMPs.Zeshan Chishti, Michael D. Powell, T. N. Vijaykumar
2005MICROBalancing Resource Utilization to Mitigate Power Density in Processor Pipelines.Michael D. Powell, Ethan Schuchman, T. N. Vijaykumar
2004ASPLOSHeat-and-run: leveraging SMT and CMP to manage power density through the operating system.Mohamed A. Gomaa, Michael D. Powell, T. N. Vijaykumar
2004ISCAExploiting Resonant Behavior to Reduce Inductive Noise.Michael D. Powell, T. N. Vijaykumar
2003ISCAPipeline Damping: A Microarchitectural Technique to Reduce Inductive Noise in Supply Voltage.Michael D. Powell, T. N. Vijaykumar
2003ISLPEDPipeline muffling and a priori current ramping: architectural techniques to reduce high-frequency inductive noise.Michael D. Powell, T. N. Vijaykumar
2003MICRODistance Associativity for High-Performance Energy-Efficient Non-Uniform Cache Architectures.Zeshan Chishti, Michael D. Powell, T. N. Vijaykumar
2002HPCAExploiting Choice in Resizable Cache Design to Optimize Deep-Submicron Processor Energy-Delay.Se-Hyun Yang, Michael D. Powell, Babak Falsafi, T. N. Vijaykumar
2002MICROReducing register ports for higher speed and lower energy.Il Park, Michael D. Powell, T. N. Vijaykumar
2001HPCAAn Integrated Circuit/Architecture Approach to Reducing Leakage in Deep-Submicron High-Performance I-Caches.Se-Hyun Yang, Michael D. Powell, Babak Falsafi, Kaushik Roy, T. N. Vijaykumar
2001MICROReducing set-associative cache energy via way-prediction and selective direct-mapping.Michael D. Powell, Amit Agarwal, T. N. Vijaykumar, Babak Falsafi, Kaushik Roy
2000ISLPEDGated-VMichael D. Powell, Se-Hyun Yang, Babak Falsafi, Kaushik Roy, T. N. Vijaykumar