Michael Laisne
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
2
Active years
2007–2025
Best venue rank
A
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | ITC | Making IJTAG Address Physical-World Digital and Mixed-Signal Test Challenges. | Hans Martin von Staudt, Jeff Rearick, Michael Laisne |
| 2022 | ITC | IEEE P1687.1: Extending the Network Boundaries for Test. | Michael Laisne, Alfred L. Crouch, Michele Portolan, Martin Keim, Hans Martin von Staudt, Bradford G. Van Treuren, Jeff Rearick, Songlin Zuo |
| 2020 | ITC | Industrial Application of IJTAG Standards to the Test of Big-A/little-d devices. | Hans Martin von Staudt, Mohamed Anas Benhebibi, Jeff Rearick, Michael Laisne |
| 2017 | ITC | Single-pin test control for Big A, little D devices. | Michael Laisne, Hans Martin von Staudt, Sourabh Bhalerao, Mark Eason |
| 2011 | ITC | Wafer probe test cost reduction of an RF/A device by automatic testset minimization - A case study. | Dragoljub Gagi Drmanac, Michael Laisne |
| 2007 | ITC | Verification and debugging of IDDQ test of low power chips. | Michael Laisne, Triphuong Nguyen, Songlin Zuo, Xiangdong Pan, Hailong Cui, Cher Bai, A. Street, M. Parley, Neetu Agrawal, K. Sundararaman |
| 2007 | VLSID | Function-based ATPG for Path Delay Faults using the Launch-Off-Capture Scan Architecture. | Edward Flanigan, Rajsekhar Adapa, Hailong Cui, Michael Laisne, Spyros Tragoudas, Tsvetomir Petrov |