| 2026 | ISLPED | Presto: Hardware Acceleration of Ciphers for Hybrid Homomorphic Encryption. | Yeonsoo Jeon, Lewis Liu, Mattan Erez, Michael Orshansky |
| 2025 | DAC | Mixed-Precision Quantization for Deep Vision Models with Integer Quadratic Programming. | Zihao Deng, Sayeh Sharify, Xin Wang, Michael Orshansky |
| 2023 | ACML | Enhancing Cross-Category Learning in Recommendation Systems with Multi-Layer Embedding Training. | Zihao Deng, Benjamin Ghaemmaghami, Ashish Kumar Singh, Benjamin Y. Cho, Leo Orshansky, Mattan Erez, Michael Orshansky |
| 2022 | DATE | Variability-Aware Training and Self-Tuning of Highly Quantized DNNs for Analog PIM. | Zihao Deng, Michael Orshansky |
| 2018 | DATE | Binary Ring-LWE hardware with power side-channel countermeasures. | Aydin Aysu, Michael Orshansky, Mohit Tiwari |
| 2018 | DATE | Efficient helper data reduction in SRAM PUFs via lossy compression. | Ye Wang, Michael Orshansky |
| 2017 | ICCAD | Efficient simulation of EM side-channel attack resilience. | Amit Kumar, Cody Scarborough, Ali E. Yilmaz, Michael Orshansky |
| 2016 | DAC | A Monte Carlo simulation flow for SEU analysis of sequential circuits. | Meng Li, Ye Wang, Michael Orshansky |
| 2016 | DATE | PolyGP: Improving GP-based analog optimization through accurate high-order monomials and semidefinite relaxation. | Ye Wang, Constantine Caramanis, Michael Orshansky |
| 2016 | ICCAD | Exploiting randomness in sketching for efficient hardware implementation of machine learning applications. | Ye Wang, Constantine Caramanis, Michael Orshansky |
| 2015 | DAC | Novel power grid reduction method based on L1 regularization. | Ye Wang, Meng Li, Xinyang Yi, Zhao Song, Michael Orshansky, Constantine Caramanis |
| 2014 | DAC | Enabling Efficient Analog Synthesis by Coupling Sparse Regression and Polynomial Optimization. | Ye Wang, Michael Orshansky, Constantine Caramanis |
| 2014 | ICCAD | Multi-level approximate logic synthesis under general error constraints. | Jin Miao, Andreas Gerstlauer, Michael Orshansky |
| 2013 | DAC | Gene modification identification under flux capacity uncertainty. | Mona Yousofshahi, Michael Orshansky, Kyongbum Lee, Soha Hassoun |
| 2013 | ETS | Approximate computing: An emerging paradigm for energy-efficient design. | Jie Han, Michael Orshansky |
| 2013 | ICCAD | Approximate logic synthesis under general error magnitude and frequency constraints. | Jin Miao, Andreas Gerstlauer, Michael Orshansky |
| 2013 | ISLPED | Variable-energy write STT-RAM architecture with bit-wise write-completion monitoring. | Tianhao Zheng, Jaeyoung Park, Michael Orshansky, Mattan Erez |
| 2012 | ICCAD | Modeling and synthesis of quality-energy optimal approximate adders. | Jin Miao, Ku He, Andreas Gerstlauer, Michael Orshansky |
| 2011 | DATE | Controlled timing-error acceptance for low energy IDCT design. | Ku He, Andreas Gerstlauer, Michael Orshansky |
| 2010 | DATE | A methodology for propagating design tolerances to shape tolerances for use in manufacturing. | Shayak Banerjee, Kanak B. Agarwal, Chin Ngai Sze, Sani R. Nassif, Michael Orshansky |
| 2010 | ICCAD | SMATO: Simultaneous mask and target optimization for improving lithographic process window. | Shayak Banerjee, Kanak B. Agarwal, Michael Orshansky |
| 2010 | ICCAD | An algorithm for exploiting modeling error statistics to enable robust analog optimization. | Ashish Kumar Singh, Mario Lok, Kareem Ragab, Constantine Caramanis, Michael Orshansky |
| 2010 | ISLPED | NBTI-aware DVFS: a new approach to saving energy and increasing processor lifetime. | Mehmet Basoglu, Michael Orshansky, Mattan Erez |
| 2009 | ICCAD | Mitigation of intra-array SRAM variability using adaptive voltage architecture. | Ashish Kumar Singh, Ku He, Constantine Caramanis, Michael Orshansky |
| 2008 | ICCAD | Electrically driven optical proximity correction based on linear programming. | Shayak Banerjee, Praveen Elakkumanan, Lars Liebmann, Michael Orshansky |
| 2007 | DAC | Accurate Waveform Modeling using Singular Value Decomposition with Applications to Timing Analysis. | Anand Ramalingam, Ashish Kumar Singh, Sani R. Nassif, Michael Orshansky, David Z. Pan |
| 2006 | DAC | Gain-based technology mapping for minimum runtime leakage under input vector uncertainty. | Ashish Kumar Singh, Murari Mani, Ruchir Puri, Michael Orshansky |
| 2006 | DAC | Statistical timing based on incomplete probabilistic descriptions of parameter uncertainty. | Wei-Shen Wang, Vladik Kreinovich, Michael Orshansky |
| 2006 | HPCA | BulletProof: a defect-tolerant CMP switch architecture. | Kypros Constantinides, Stephen Plaza, Jason A. Blome, Bin Zhang, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Michael Orshansky |
| 2006 | ICCAD | Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization. | Murari Mani, Ashish Kumar Singh, Michael Orshansky |
| 2006 | ICCAD | An accurate sparse matrix based framework for statistical static timing analysis. | Anand Ramalingam, Gi-Joon Nam, Ashish Kumar Singh, Michael Orshansky, Sani R. Nassif, David Z. Pan |
| 2006 | ICCAD | Robust estimation of parametric yield under limited descriptions of uncertainty. | Wei-Shen Wang, Michael Orshansky |
| 2006 | ICCAD | Analytical modeling of SRAM dynamic stability. | Bin Zhang, Ari Arapostathis, Sani R. Nassif, Michael Orshansky |
| 2006 | SAC | Interval-based robust statistical techniques for non-negative convex functions, with application to timing analysis of computer chips. | Michael Orshansky, Wei-Shen Wang, Martine Ceberio, Gang Xiang |
| 2005 | DAC | An efficient algorithm for statistical minimization of total power under timing yield constraints. | Murari Mani, Anirudh Devgan, Michael Orshansky |
| 2005 | ICCAD | Statistical technology mapping for parametric yield. | Ashish Kumar Singh, Murari Mani, Michael Orshansky |
| 2004 | DAC | Fast statistical timing analysis handling arbitrary delay correlations. | Michael Orshansky, Arnab Bandyopadhyay |
| 2004 | ICCD | A New Statistical Optimization Algorithm for Gate Sizing. | Murari Mani, Michael Orshansky |
| 2004 | ISLPED | Leakage power reduction by dual-vth designs under probabilistic analysis of vth variation. | Michael Liu, Wei-Shen Wang, Michael Orshansky |
| 2003 | ISLPED | Minimization of dynamic and static power through joint assignment of threshold voltages and sizing optimization. | David Nguyen, Abhijit Davare, Michael Orshansky, David G. Chinnery, Brandon Thompson, Kurt Keutzer |
| 2002 | DAC | A general probabilistic framework for worst case timing analysis. | Michael Orshansky, Kurt Keutzer |
| 2000 | ICCAD | Impact of Systematic Spatial Intra-Chip Gate Length Variability on Performance of High-Speed Digital Circuits. | Michael Orshansky, Linda Milor, Pinhong Chen, Kurt Keutzer, Chenming Hu |
| 1998 | DAC | A Statistical Performance Simulation Methodology for VLSI Circuits. | Michael Orshansky, James C. Chen, Chenming Hu |