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Michalis D. Galanis

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

14

Venues

6

Active years

2004–2006

Best venue rank

C

Where they publish

Papers

14 indexed papers, newest first.

Year	Venue	Title	Authors
2006	ISCAS	Resource constrained modulo scheduling for coarse-grained reconfigurable arrays.	Grigoris Dimitroulakos, Michalis D. Galanis, Constantinos E. Goutis
2006	ISCAS	Mapping DSP applications on processor/coarse-grain reconfigurable array architectures.	Michalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis
2005	FCCM	Accelerating Applications by Mapping Critical Kernels on Coarse-Grain Reconfigurable Hardware in Hybrid Systems.	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
2005	FPL	Performance Improvements using Coarse-Grain Reconfigurable Logic in Embedded SoCs.	Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis
2005	ISCAS	A high-throughput and memory efficient 2D discrete wavelet transform hardware architecture for JPEG2000 standard.	Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis, Athanasios Milidonis
2005	ISCAS	An automated methodology for memory-conscious mapping of DSP applications on coarse-grain reconfigurable arrays.	Michalis D. Galanis, Gregory Dimitroulakos, Constantinos E. Goutis
2005	ISCAS	A methodology for partitioning DSP applications in hybrid reconfigurable systems.	Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis
2005	ISCAS	A RAM-based FPGA implementation of the 64-bit MISTY1 block cipher.	Paris Kitsos, Michalis D. Galanis, Odysseas G. Koufopavlou
2004	DATE	A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms.	Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis
2004	FCCM	Accelerating DSP Applications on a Mixed Granularity Platform with a New Reconfigurable Coarse-Grain Data-Path.	Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis
2004	FPGA	A novel coarse-grain reconfigurable data-path for accelerating DSP kernels.	Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis
2004	FPL	Mapping DSP Applications to a High-Performance Reconfigurable Coarse-Grain Data-Path.	Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis
2004	ISCAS	High-speed hardware implementations of the KASUMI block cipher.	Paris Kitsos, Michalis D. Galanis, Odysseas G. Koufopavlou
2004	SCOPES	An Automated C++ Code and Data Partitioning Framework for Data Management of Data-Intensive Applications.	Athanasios Milidonis, Grigoris Dimitroulakos, Michalis D. Galanis, George Theodoridis, Constantinos E. Goutis, Francky Catthoor