Michiaki Muraoka
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
10
Venues
3
Active years
1982–2004
Best venue rank
A*
Where they publish
Papers
10 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2004 | ASPDAC | Design methodology for SoC arthitectures based on reusable virtual cores. | Michiaki Muraoka, Hiroaki Nishi, Rafael K. Morizawa, Hideaki Yokota, Hideyuki Hamada |
| 2003 | ASPDAC | VCDS tool demonstration. | Rafael K. Morizawa, Kazuo Tanaka, Keisuke Watanabe, Yuji Kaitsu, Shoji Hanamura, Takao Shinsha, Michiaki Muraoka |
| 2003 | ASPDAC | VCore-based design methodology. | Michiaki Muraoka, Hideyuki Hamada, Hiroaki Nishi, Toshihiko Tada, Yoichi Onishi, Toshinori Hosokawa, Kenji Yoshida |
| 2003 | ASPDAC | Synthesis for SoC architecture using VCores. | Hiroaki Nishi, Michiaki Muraoka, Rafael K. Morizawa, Hideaki Yokota, Hideyuki Hamada |
| 2003 | ASPDAC | VCore-based platform for SoC design. | Yoichi Onishi, Michiaki Muraoka, Makoto Utsuki, Naoyuki Tsubaki |
| 2002 | VTS | A Test Generation Method Using a Compacted Test Table and a Test Generation Method Using a Compacted Test Plan Table for RTL Data Path Circuits. | Toshinori Hosokawa, Hiroshi Date, Michiaki Muraoka |
| 1995 | ASPDAC | Design for testability using register-transfer level partial scan selection. | Akira Motohara, Sadami Takeoka, Toshinori Hosokawa, Mitsuyasu Ohta, Yuji Takai, Michihiro Matsumoto, Michiaki Muraoka |
| 1993 | DAC | A State Traversal Algorithm Using a State Covariance Matrix. | Akira Motohara, Toshinori Hosokawa, Michiaki Muraoka, Hidetsugu Maekawa, Kazuhiro Kayashima, Yasuharu Shimeki, Seichi Shin |
| 1985 | DAC | ACTAS: an accurate timing analysis system for VLSI. | Michiaki Muraoka, Hirokazu Iida, Hideyuki Kikuchihara, Michio Murakami, Kazuyuki Hirakawa |
| 1982 | DAC | Logic simulation for LSI. | Kazuyuki Hirakawa, Noboru Shiraki, Michiaki Muraoka |