Michihiro Koibuchi
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
67
Venues
26
Active years
2001–2024
Best venue rank
A*
Where they publish
- BICPP10 papers
- CPDP8 papers
- CPDCAT4 papers
- CCLUSTER4 papers
- A*HPCA4 papers
- NationalPDPTA4 papers
- BCCGRID3 papers
- CICA3PP3 papers
- BICPADS3 papers
- CISPA3 papers
- BFPL3 papers
- BASPDAC3 papers
- BLCN2 papers
- NationalFCCM1 paper
- A*DAC1 paper
- BNCA1 paper
- ADATE1 paper
- A*ISCA1 paper
- ACoNEXT1 paper
- BRTCSA1 paper
- A*MICRO1 paper
- CISDA1 paper
- BGLOBECOM1 paper
- BICCCN1 paper
- CEUC1 paper
- NationalCATA1 paper
Papers
67 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2024 | CCGRID | A Bandwidth-Optimal All-to-All Communication in Two-Dimensional Fully Connected Network. | Kien Trung Pham, Truong Thao Nguyen, Michihiro Koibuchi |
| 2023 | PDP | An Auto-Tuning Method for High-Bandwidth Low-Latency Approximate Interconnection Networks. | Shoichi Hirasawa, Michihiro Koibuchi |
| 2022 | FCCM | A Scalable Distributed Radix Sorter for FPGA Clusters using High-Bandwidth Memory Networks. | Yutaka Urino, Takanori Shimizu, Hiroshi Yamaguchi, Kenji Mizutani, Shigeru Nakamura, Tatsuya Usuki, Michihiro Koibuchi |
| 2022 | PDCAT | A High-Radix Circulant Network Topology for Efficient Collective Communication. | Ke Cui, Michihiro Koibuchi |
| 2022 | PDCAT | A Hardware Trojan Exploiting Coherence Protocol on NoCs. | Yoshiya Shikama, Michihiro Koibuchi, Hideharu Amano |
| 2021 | CLUSTER | Packet Forwarding Cache of Commodity Switches for Parallel Computers. | Shoichi Hirasawa, Hayato Yamaki, Michihiro Koibuchi |
| 2021 | ICA3PP | The Case for Disjoint Job Mapping on High-Radix Networked Parallel Computers. | Yao Hu, Michihiro Koibuchi |
| 2021 | LCN | Accelerating MPI Communication Using Floating-point Compression on Lossy Interconnection Networks. | Yao Hu, Michihiro Koibuchi |
| 2021 | PDP | A Case for Low-Latency Network-on-Chip using Compression Routers. | Naoya Niwa, Yoshiya Shikama, Hideharu Amano, Michihiro Koibuchi |
| 2021 | PDP | Low-Latency Low-Energy Memory-Cube Networks using Dual-Voltage Datapaths. | Yoshiya Shikama, Ryuta Kawano, Hiroki Matsutani, Hideharu Amano, Yusuke Nagasaka, Naoto Fukumoto, Michihiro Koibuchi |
| 2020 | PDP | Accelerating Deep Learning using Multiple GPUs and FPGA-Based 10GbE Switch. | Tomoya Itsubo, Michihiro Koibuchi, Hideharu Amano, Hiroki Matsutani |
| 2019 | DAC | Sparse 3-D NoCs with Inductive Coupling. | Michihiro Koibuchi, Lambert T. Leong, Tomohiro Totoki, Naoya Niwa, Hiroki Matsutani, Hideharu Amano, Henri Casanova |
| 2019 | ICPADS | Diameter/ASPL-Based Mapping of Applications with Uncertain Communication over Random Interconnection Networks. | Yao Hu, Michihiro Koibuchi |
| 2019 | ICPP | The Case for Water-Immersion Computer Boards. | Michihiro Koibuchi, Ikki Fujiwara, Naoya Niwa, Tomohiro Totoki, Shoichi Hirasawa |
| 2019 | ISPA | The Impact of Application Mapping on Non-Random and Random Network Topologies. | Yao Hu, Michihiro Koibuchi |
| 2018 | NCA | Low-Reliable Low-Latency Networks Optimized for HPC Parallel Applications. | Truong Thao Nguyen, Hiroki Matsutani, Michihiro Koibuchi |
| 2017 | CCGRID | Cable-geometric error-prone approach for low-latency interconnection networks. | Thao-Nguyen Nguyen, Michihiro Koibuchi |
| 2017 | CLUSTER | A Case for Uni-directional Network Topologies in Large-Scale Clusters. | Michihiro Koibuchi, Tomohiro Totoki, Hiroki Matsutani, Hideharu Amano, Fabien Chaix, Ikki Fujiwara, Henri Casanova |
| 2017 | FPL | In-switch approximate processing: Delayed tasks management for MapReduce applications. | Koya Mitsuzuka, Ami Hayashi, Michihiro Koibuchi, Hideharu Amano, Hiroki Matsutani |
| 2017 | HPCA | High-Bandwidth Low-Latency Approximate Interconnection Networks. | Daichi Fujiki, Kiyo Ishii, Ikki Fujiwara, Hiroki Matsutani, Hideharu Amano, Henri Casanova, Michihiro Koibuchi |
| 2017 | ICPADS | HiRy: An Advanced Theory on Design of Deadlock-Free Adaptive Routing for Arbitrary Topologies. | Ryuta Kawano, Ryota Yasudo, Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano |
| 2017 | ICPP | Order/Radix Problem: Towards Low End-to-End Latency Interconnection Networks. | Ryota Yasudo, Michihiro Koibuchi, Koji Nakano, Hiroki Matsutani, Hideharu Amano |
| 2017 | PDCAT | A Case of Electrical Circuit Switched Interconnection Network for Parallel Computers. | Yao Hu, Tomohiro Kudoh, Michihiro Koibuchi |
| 2016 | CCGRID | HPC Job Mapping over Reconfigurable Wireless Links. | Yao Hu, Ikki Fujiwara, Michihiro Koibuchi |
| 2016 | ICA3PP | Deterministic Construction of Regular Geometric Graphs with Short Average Distance and Limited Edge Length. | Satoshi Fujita, Koji Nakano, Michihiro Koibuchi, Ikki Fujiwara |
| 2016 | ICPP | Randomly Optimized Grid Graph for Low-Latency Interconnection Networks. | Koji Nakano, Daisuke Takafuji, Satoshi Fujita, Hiroki Matsutani, Ikki Fujiwara, Michihiro Koibuchi |
| 2016 | PDP | Suitability of the Random Topology for HPC Applications. | Fabien Chaix, Ikki Fujiwara, Michihiro Koibuchi |
| 2016 | PDP | Randomizing Packet Memory Networks for Low-Latency Processor-Memory Communication. | Daichi Fujiki, Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano |
| 2015 | HPCA | Augmenting low-latency HPC network with free-space optical links. | Ikki Fujiwara, Michihiro Koibuchi, Tomoya Ozaki, Hiroki Matsutani, Henri Casanova |
| 2015 | PDP | Optimized Core-Links for Low-Latency NoCs. | Ryuta Kawano, Seiichi Tade, Ikki Fujiwara, Hiroki Matsutani, Hideharu Amano, Michihiro Koibuchi |
| 2014 | DATE | Low-latency wireless 3D NoCs via randomized shortcut chips. | Hiroki Matsutani, Michihiro Koibuchi, Ikki Fujiwara, Takahiro Kagami, Yasuhiro Take, Tadahiro Kuroda, Paul Bogdan, Radu Marculescu, Hideharu Amano |
| 2014 | ICPADS | Layout-aware expandable low-degree topology. | Nguyen T. Truong, Van K. Nguyen, Nhat T. X. Le, Ikki Fujiwara, Fabien Chaix, Michihiro Koibuchi |
| 2014 | PDP | Hierarchical Network Coding for Collective Communication on HPC Interconnects. | Ahmed Shalaby, Mohamed El-Sayed Ragab, Victor Goulart, Ikki Fujiwara, Michihiro Koibuchi |
| 2013 | ASPDAC | A case for wireless 3D NoCs for CMPs. | Hiroki Matsutani, Paul Bogdan, Radu Marculescu, Yasuhiro Take, Daisuke Sasaki, Hao Zhang, Michihiro Koibuchi, Tadahiro Kuroda, Hideharu Amano |
| 2013 | HPCA | Layout-conscious random topologies for HPC off-chip interconnects. | Michihiro Koibuchi, Ikki Fujiwara, Hiroki Matsutani, Henri Casanova |
| 2013 | ICA3PP | A Routing Strategy for Inductive-Coupling Based Wireless 3-D NoCs by Maximizing Topological Regularity. | Daisuke Sasaki, Hao Zhang, Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano |
| 2013 | ICPP | Distributed Shortcut Networks: Layout-Aware Low-Degree Topologies Exploiting Small-World Effect. | Van K. Nguyen, Nhat T. X. Le, Ikki Fujiwara, Michihiro Koibuchi |
| 2013 | LCN | PopCache: Cache more or less based on content popularity for information-centric networking. | Kalika Suksomboon, Saran Tarnoi, Yusheng Ji, Michihiro Koibuchi, Kensuke Fukuda, Shunji Abe, Motonori Nakamura, Michihiro Aoki, Shigeo Urushidani, Shigeki Yamada |
| 2012 | ASPDAC | A multi-Vdd dynamic variable-pipeline on-chip router for CMPs. | Hiroki Matsutani, Yuto Hirata, Michihiro Koibuchi, Kimiyoshi Usami, Hiroshi Nakamura, Hideharu Amano |
| 2012 | ISCA | A case for random shortcut topologies for HPC interconnects. | Michihiro Koibuchi, Hiroki Matsutani, Hideharu Amano, D. Frank Hsu, Henri Casanova |
| 2012 | PDCAT | Cabinet Layout Optimization of Supercomputer Topologies for Shorter Cable Length. | Ikki Fujiwara, Michihiro Koibuchi, Henri Casanova |
| 2011 | CoNEXT | Impact of Tohoku earthquake on R&E network in Japan. | Kensuke Fukuda, Michihiro Aoki, Shunji Abe, Yusheng Ji, Michihiro Koibuchi, Motonori Nakamura, Shigeki Yamada, Shigeo Urushidani |
| 2011 | RTCSA | A Dynamic Link-Width Optimization for Network-on-Chip. | Daihan Wang, Michihiro Koibuchi, Tomohiro Yoneda, Hiroki Matsutani, Hideharu Amano |
| 2010 | MICRO | A variable-pipeline on-chip router optimized to traffic pattern. | Yuto Hirata, Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano |
| 2010 | PDPTA | Hardware Architecture for Supporting High-speed Database Insertion on Service-oriented Router for Future Internet. | Tomoaki Makino, Koichi Inoue, Michihiro Koibuchi, Hideyuki Kawashima, Hiroaki Nishi |
| 2009 | HPCA | Prediction router: Yet another low latency on-chip router architecture. | Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano, Tsutomu Yoshinaga |
| 2009 | ISDA | Efficient Scheduling Algorithms on Bandwidth Reservation Service of Internet Using Metaheuristics. | Tomoyuki Hiroyasu, Kozo Kawasaki, Michihiro Koibuchi, Shigeo Urushidani, Mitsunori Miki, Masato Yoshimi |
| 2009 | ISPA | Performance Analysis of ClearSpeed's CSX600 Interconnects. | Yuri Nishikawa, Michihiro Koibuchi, Masato Yoshimi, Akihiro Shitara, Kenichi Miura, Hideharu Amano |
| 2009 | PDPTA | An On/Off Link Activation Method for Power Regulation in InfiniBand. | Jos Miguel Montaana Aliaga, Michihiro Koibuchi, Takafumi Watanabe, Tomoyuki Hiroyasu, Hiroki Matsutani, Hideharu Amano |
| 2008 | ASPDAC | Run-time power gating of on-chip routers using look-ahead routing. | Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano, Daihan Wang |
| 2008 | CLUSTER | Impact of topology and link aggregation on a PC cluster with Ethernet. | Takafumi Watanabe, Masahiro Nakao, Tomoyuki Hiroyasu, Tomohiro Otsuka, Michihiro Koibuchi |
| 2008 | FPL | A link removal methodology for Networks-on-Chip on reconfigurable systems. | Daihan Wang, Hiroki Matsutani, Hideharu Amano, Michihiro Koibuchi |
| 2007 | FPL | A Temporal Correlation Based Port Combination Methodology for Networks-on-chip on Reconfigurable Systems. | Daihan Wang, Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano |
| 2007 | GLOBECOM | Layer-1 Bandwidth on Demand Services in SINET3. | Shigeo Urushidani, Jun Matsukata, Kensuke Fukuda, Shunji Abe, Yusheng Ji, Michihiro Koibuchi, Shigeki Yamada, Kaori Shimizu, Tomonori Takeda, Ichiro Inoue, Kohei Shiomoto |
| 2007 | ICCCN | Investigating QoS Performance on a Testbed Network. | Jumpot Phuritatkul, Kien Nguyen, Michihiro Koibuchi, Yusheng Ji |
| 2007 | ICPP | Tightly-Coupled Multi-Layer Topologies for 3-D NoCs. | Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano |
| 2007 | ICPP | Performance Improvement Methodology for ClearSpeed's CSX600. | Yuri Nishikawa, Michihiro Koibuchi, Masato Yoshimi, Kenichi Miura, Hideharu Amano |
| 2006 | ICPP | Switch-tagged VLAN Routing Methodology for PC Clusters with Ethernet. | Tomohiro Otsuka, Michihiro Koibuchi, Tomohiro Kudoh, Hideharu Amano |
| 2006 | ISPA | Enforcing Dimension-Order Routing in On-Chip Torus Networks Without Virtual Channels. | Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano |
| 2005 | ICPP | VLAN-Based Minimal Paths in PC Cluster with Ethernet on Mesh and Torus. | Tomohiro Otsuka, Michihiro Koibuchi, Akiya Jouraku, Hideharu Amano |
| 2005 | PDPTA | Destination Bundle: A Routing Table Reduction Technique for Distributed Routing on Dependable Networks-on-Chips. | Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano |
| 2004 | EUC | Folded Fat H-Tree: An Interconnection Topology for Dynamically Reconfigurable Processor Array. | Yutaka Yamada, Hideharu Amano, Michihiro Koibuchi, Akiya Jouraku, Kenichiro Anjo, Katsunobu Nishimura |
| 2003 | CLUSTER | Performance Evaluation of Routing Algorithms in RHiNET-2 Cluster. | Michihiro Koibuchi, Konosuke Watanabe, Kenichi Kono, Akiya Jouraku, Hideharu Amano |
| 2003 | ICPP | Descending Layers Routing: A Deadlock-Free Deterministic Routing using Virtual Channels in System Area Networks with Irregular Topologies. | Michihiro Koibuchi, Akiya Jouraku, Konosuke Watanabe, Hideharu Amano |
| 2002 | PDPTA | The Impact of Path Selection Algorithm of Adaptive Routing for Implementing Deterministic Routing. | Michihiro Koibuchi, Akiya Jouraku, Hideharu Amano |
| 2001 | CATA | The impact of output selection function on adaptive routing. | Akira Funahashi, Michihiro Koibuchi, Akiya Jouraku, Hideharu Amano |
| 2001 | ICPP | L-Turn Routing: An Adaptive Routing in Irregular Networks. | Michihiro Koibuchi, Akira Funahashi, Akiya Jouraku, Hideharu Amano |