| 2019 | DCC | Decoder-Side Intra Mode Derivation Based on a Histogram of Gradients in Versatile Video Coding. | Anthony Nasrallah, Elie Gabriel Mora, Thomas Guionnet, Mickal Raulet |
| 2019 | ICIP | Decoder-Side Intra Mode Derivation with Texture Analysis in VVC Test Model. | Anthony Nasrallah, Mohsen Abdoli, Elie Gabriel Mora, Thomas Guionnet, Mickal Raulet |
| 2015 | ICASSP | Selective video encryption using chaotic system in the SHVC extension. | Wassim Hamidouche, Mousa Farajallah, Mickal Raulet, Olivier Dforges, Safwan El Assad |
| 2014 | ACSSC | Development and optimization of high level dataflow programs: The HEVC decoder design case. | Khaled Jerbi, Daniele Renzi, Damien de Saint Jorre, Herv Yviquel, Mickal Raulet, Claudio Alberti, Marco Mattavelli |
| 2014 | ICASSP | Multi-core software architecture for the scalable HEVC decoder. | Wassim Hamidouche, Mickal Raulet, Olivier Dforges |
| 2014 | ICASSP | Efficient software synthesis of dynamic dataflow programs. | Herv Yviquel, Alexandre Sanchez, Pekka Jskelinen, Jarmo Takala, Mickal Raulet, Emmanuel Casseau |
| 2014 | ICIP | Real time SHVC decoder: Implementation and complexity analysis. | Wassim Hamidouche, Mickal Raulet, Olivier Dforges |
| 2014 | ICIP | Unified real time software decoder for HEVC extensions. | Benot Martin, Wassim Hamidouche, Jean Le Feuvre, Mickal Raulet |
| 2014 | MMSys | Ultra high definition HEVC DASH data set. | Jean Le Feuvre, J.-M. Thiesse, Matthieu Parmentier, Mickal Raulet, Christophe Daguet |
| 2013 | DCC | Efficient Parallelization of Different HEVC Decoding Stages. | Anand Meher Kotra, Mickal Raulet, Olivier Dforges |
| 2013 | ICASSP | Comparison of different parallel implementations for deblocking filter of HEVC. | Anand Meher Kotra, Mickal Raulet, Olivier Dforges |
| 2012 | ICASSP | Automatic generation of synthesizable hardware implementation from high level RVC-cal description. | Khaled Jerbi, Mickal Raulet, Olivier Dforges, Mohamed Abid |
| 2011 | ICASSP | Scheduling of CAL actor networks based on dynamic code analysis. | Jani Boutellier, Olli Silvn, Mickal Raulet |
| 2010 | DSD | A Test Bench for Distortion-Energy Optimization of a DSP-Based H.264/SVC Decoder. | Fernando Pescador, Eduardo Jurez Martnez, David Samper Martnez, Csar Sanz, Mickal Raulet |
| 2010 | ISCAS | A codesign synthesis from an MPEG-4 decoder dataflow description. | Nicolas Siret, Ismal Sabry, Jean-Franois Nezan, Mickal Raulet |
| 2010 | MMSys | Reconfigurable video coding: a stream programming approach to the specification of new video coding standards. | Jrn W. Janneck, Marco Mattavelli, Mickal Raulet, Matthieu Wipliez |
| 2009 | ICASSP | Exploiting statically schedulable regions in dataflow programs. | Ruirui Gu, Jrn W. Janneck, Mickal Raulet, Shuvra S. Bhattacharyya |
| 2009 | ICIP | An RVC dataflow description of the AVC Constrained Baseline Profile decoder. | Jrme Gorin, Mickal Raulet, Yuan-Long Cheng, He-Yuan Lin, Nicolas Siret, Kazuo Sugimoto, Gwo Giun Lee |
| 2009 | ISCAS | An Integrated Environment for HW/SW Co-design based on a CAL Specification and HW/SW Code Generators. | Ghislain Roquier, Christophe Lucarz, Marco Mattavelli, Matthieu Wipliez, Mickal Raulet, Jrn W. Janneck, Ian D. Miller, David B. Parlour |
| 2008 | ICIP | Software synthesis of CAL actors for the MPEG reconfigurable Video Coding framework. | Ghislain Roquier, Matthieu Wipliez, Mickal Raulet, Jean-Franois Nezan, Olivier Dforges |
| 2003 | ICASSP | Rapid prototyping for an optimized MPEG-4 decoder implementation over a parallel heterogenous architecture. | Nicolas Ventroux, Jean-Franois Nezan, Mickal Raulet, Olivier Dforges |
| 2002 | PDPTA | A VsynDEx Methodology for Fast Prototyping of Multi-C6x DSP Architectures. | Jean-Franois Nezan, Virginie Fresse, Olivier Dforges, Mickal Raulet |
| 2002 | SPAA | Rapid prototyping methodology for multi-DSP TI C6X platforms applied to an Mpeg-2 coding application. | Jean-Franois Nezan, Olivier Dforges, Mickal Raulet |