Mikhail Asiatici
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
3
Active years
2016–2021
Best venue rank
A*
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2021 | ISCA | Large-Scale Graph Processing on FPGAs with Caches for Thousands of Simultaneous Misses. | Mikhail Asiatici, Paolo Ienne |
| 2019 | FPGA | Stop Crying Over Your Cache Miss Rate: Handling Efficiently Thousands of Outstanding Misses in FPGAs. | Mikhail Asiatici, Paolo Ienne |
| 2019 | FPL | DynaBurst: Dynamically Assemblying DRAM Bursts over a Multitude of Random Accesses. | Mikhail Asiatici, Paolo Ienne |
| 2018 | FPGA | FPGAs in the Datacenters: the Case of Parallel Hybrid Super Scalar String Sample Sort (pHS | Mikhail Asiatici, Damian Maiorano, Paolo Ienne |
| 2018 | FPGA | LEOSoC: An Open-Source Cross-Platform Embedded Linux Library for Managing Hardware Accelerators in Heterogeneous System-on-Chips(Abstract Only). | Andrea Guerrieri, Sahand Kashani-Akhavan, Mikhail Asiatici, Pasquale Lombardi, Bilel Belhadj, Paolo Ienne |
| 2016 | FPL | Designing a virtual runtime for FPGA accelerators in the cloud. | Mikhail Asiatici, Nithin George, Kizheppatt Vipin, Suhaib A. Fahmy, Paolo Ienne |