Mitsuhiro Hamada
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
1
Active years
1984–2000
Best venue rank
A
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2000 | ITC | A built-in self-repair analyzer (CRESTA) for embedded DRAMs. | Tomoya Kawagoe, Jun Ohtani, Mitsutaka Niiro, Tukasa Ooishi, Mitsuhiro Hamada, Hideto Hidaka |
| 1996 | ITC | A Built-In Self-Test Circuit with Timing Margin Test Function in a 1Gbit Synchronous DRAM. | Narumi Sakashita, Fumihiro Okuda, Ken'ichi Shimomura, Hiroki Shimano, Mitsuhiro Hamada, Tetsuo Tada, Shinji Komori, Kazuo Kyuma, Akihiko Yasuoka, Haruhiko Abe |
| 1986 | ITC | Redundancy Test for 1 Mbit DRAM Using Multi-Bit-Test Mode. | Yasumasa Nishimura, Mitsuhiro Hamada, Hideto Hidaka, Hideyuki Ozaki, Kazuyasu Fujishima, Y. Hayasaka |
| 1984 | ITC | A New Timing Calibration Method for High Speed Memory Test. | Yasumasa Nishimura, Mitsuhiro Hamada, Y. Hayasaka |