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Mohammad H. Tehranipour

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

11

Venues

5

Active years

2001–2004

Best venue rank

C

Where they publish

Papers

11 indexed papers, newest first.

YearVenueTitleAuthors
2004DATENine-Coded Compression Technique with Application to Reduced Pin-Count Testing and Flexible On-Chip Decompression.Mohammad H. Tehranipour, Mehrdad Nourani, Krishnendu Chakrabarty
2004ISCASLow power pattern generation for BIST architecture.Nisar Ahmed, Mohammad H. Tehranipour, Mehrdad Nourani
2004ISCASFrequency driven repeater insertion for deep submicron.Nisar Ahmed, Mohammad H. Tehranipour, Dian Zhou, Mehrdad Nourani
2004ISCASMixed RL-Huffman encoding for power reduction and data compression in scan test.Mohammad H. Tehranipour, Mehrdad Nourani, Karim Arabi, Ali Afzali-Kusha
2003DATEExtending JTAG for Testing Signal Integrity in SoCs.Nisar Ahmed, Mohammad H. Tehranipour, Mehrdad Nourani
2003ICCDMultiple Transition Model and Enhanced Boundary Scan Architecture to Test Interconnects for Signal Integrity.Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nourani
2003ISCASeUTDSP: a design study of a new VLIW-based DSP architecture.G. R. Chaji, R. M. Pourrad, Seid Mehdi Fakhraie, Mohammad H. Tehranipour
2003ISCASSystematic test program generation for SoC testing using embedded processor.Mohammad H. Tehranipour, Mehrdad Nourani, Seid Mehdi Fakhraie, Ali Afzali-Kusha
2003VTSTesting SoC Interconnects for Signal Integrity Using Boundary Scan.Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nourani
2002ITCSignal Integrity Loss in SoC's Interconnects: A Diagnosis Approach Using Embedded Microprocessor.Mohammad H. Tehranipour, Mehrdad Nourani
2001ISCASAn efficient BIST method for testing of embedded SRAMs.Mohammad H. Tehranipour, Zainalabedin Navabi, Seid Mehdi Fakhraie