Mokhtar Hirech
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
5
Active years
1994–2010
Best venue rank
National
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2010 | VTS | Test cost and test power conflicts: EDA perspective. | Mokhtar Hirech |
| 2008 | DATE | Test Strategies for Low Power Devices. | C. P. Ravikumar, Mokhtar Hirech, Xiaoqing Wen |
| 2002 | ICCAD | Test-model based hierarchical DFT synthesis. | Sanjay Ramnath, Frederic Neuveux, Mokhtar Hirech, Felix Ng |
| 1998 | ITC | A new approach to scan chain reordering using physical design information. | Mokhtar Hirech, James Beausang, Xinli Gu |
| 1994 | ISCAS | A Redefinable Symbolic Simulation Technique to Testability Design Rules Checking. | Mokhtar Hirech, Olivier Florent, Alain Greiner, El Housseine Rejouan |