Mukesh Ranjan
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
4
Active years
2004–2006
Best venue rank
C
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2006 | ISCAS | Exact hierarchical symbolic analysis of large analog networks using a general interconnection template. | Mukesh Ranjan, Ranga Vemuri |
| 2006 | VLSID | Symbolic Time-Domain Behavioral and Performance Modeling of Linear Analog Circuits Using an Efficient Symbolic Newton-Iteration Algorithm for Pole Extraction. | Ritochit Chakraborty, Mukesh Ranjan, Ranga Vemuri |
| 2005 | ASPDAC | Efficient symbolic sensitivity analysis of analog circuits using element-coefficient diagrams. | Huiying Yang, Mukesh Ranjan, Wim Verhaegen, Mengmeng Ding, Ranga Vemuri, Georges G. E. Gielen |
| 2004 | DATE | Fast, Layout-Inclusive Analog Circuit Synthesis using Pre-Compiled Parasitic-Aware Symbolic Performance Models. | Mukesh Ranjan, Wim Verhaegen, Anuradha Agarwal, Hemanth Sampath, Ranga Vemuri, Georges G. E. Gielen |