Mustafa Badaroglu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
11
Venues
6
Active years
2000–2016
Best venue rank
A*
Where they publish
Papers
11 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2016 | ICCAD | Interconnect-aware device targeting from PPA perspective. | Mustafa Badaroglu, Jeff Xu |
| 2014 | ICCD | More Moore landscape for system readiness - ITRS2.0 requirements. | Mustafa Badaroglu, Kwok Ng, Mehdi Salmani Jelodar, SungGeun Kim, Gerhard Klimeck, Chorng-Ping Chang, Charles Cheung, Yuzo Fukuzaki |
| 2013 | DAC | TEASE: a systematic analysis framework for early evaluation of FinFET-based advanced technology nodes. | Arindam Mallik, Paul Zuber, Tsung-Te Liu, Bharani Chava, Bhavana Ballal, Pablo Royer Del Bario, Rogier Baert, Kris Croes, Julien Ryckaert, Mustafa Badaroglu, Abdelkarim Mercha, Diederik Verkest |
| 2008 | DATE | Calibration of Integrated CMOS Hall Sensors Using Coil-on-Chip in ATE Environment. | Mustafa Badaroglu, Guy Decabooter, Francois Laulanet, Olivier Charlier |
| 2007 | ISCAS | Scalable Gate-Level Models for Power and Timing Analysis. | Mustafa Badaroglu, Geert Van der Plas, Piet Wambacq, Stphane Donnay, Georges G. E. Gielen, Hugo De Man |
| 2007 | VTC | Optimized Signal Acquisition for Low-Complexity and Low-Power IR-UWB Transceivers. | Claude Desset, Mustafa Badaroglu, Julien Ryckaert, Bart van Poucke |
| 2004 | DAC | High-level simulation of substrate noise in high-ohmic substrates with interconnect and supply effects. | Geert Van der Plas, Mustafa Badaroglu, Gerd Vandersteen, Petr Dobrovoln, Piet Wambacq, Stphane Donnay, Georges G. E. Gielen, Hugo De Man |
| 2004 | DATE | Digital Ground Bounce Reduction by Phase Modulation of the Clock. | Mustafa Badaroglu, Piet Wambacq, Geert Van der Plas, Stphane Donnay, Georges G. E. Gielen, Hugo De Man |
| 2002 | DAC | Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients. | Mustafa Badaroglu, Kris Tiri, Stphane Donnay, Piet Wambacq, Hugo De Man, Ingrid Verbauwhede, Georges G. E. Gielen |
| 2001 | DATE | High-level simulation of substrate noise generation from large digital circuits with multiple supplies. | Mustafa Badaroglu, Marc van Heijningen, Vincent Gravot, Stphane Donnay, Hugo De Man, Georges G. E. Gielen, Marc Engels, Ivo Bolsens |
| 2000 | DAC | High-level simulation of substrate noise generation including power supply noise coupling. | Marc van Heijningen, Mustafa Badaroglu, Stphane Donnay, Marc Engels, Ivo Bolsens |