Skip to content

Nagisa Ishiura

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

17

Venues

7

Active years

1989–2021

Best venue rank

A*

Where they publish

Papers

17 indexed papers, newest first.

YearVenueTitleAuthors
2021TenconFull Hardware Implementation of FreeRTOS-Based Real-Time Systems.Wakako Nakano, Yukino Shinohara, Nagisa Ishiura
2018RSPSynthesis of Full Hardware Implementation of RTOS-Based Systems.Yuuki Oosako, Nagisa Ishiura, Hiroyuki Tomiyama, Hiroyuki Kanbara
2017RSPBinary synthesis implementing external interrupt handler as independent module.Naoya Ito, Yuuki Oosako, Nagisa Ishiura, Hiroyuki Kanbara, Hiroyuki Tomiyama
2017RSPSpeculative execution in distributed controllers for high-level synthesis.Miho Shimizu, Nagisa Ishiura, Sayuri Ota, Wakako Nakano
2000ASPDACThread partitioning method for hardware compiler bach.Mizuki Takahashi, Nagisa Ishiura, Akihisa Yamada, Takashi Kambe
1998ASPDACBinding and Scheduling Algorithms for Highly Retargetable Compilation.Masayuki Yamaguchi, Nagisa Ishiura, Takashi Kambe
1995ISCASOptimal Scheduling for Conditional Recource Sharing.Akihisa Yamada, Satoru Nakamura, Nagisa Ishiura, Isao Shirakawa, Takashi Kambe
1991DACProbabilistic CTSS: Analysis of Timing Error Probability in Asynchronous Logic Circuits.Yutaka Deguchi, Nagisa Ishiura, Shuzo Yajima
1991DACBreadth-First Manipulation of SBDD of Boolean Functions for Vector Processing.Hiroyuki Ochi, Nagisa Ishiura, Shuzo Yajima
1991ICCADMinimazation of Binary Decision Diagrams Based on Exchanges of Variables.Nagisa Ishiura, Hiroshi Sawada, Shuzo Yajima
1991ICCADFault Simulation for Multiple Faults Using Shared BDD Representation of Fault Sets.Noriyuki Takahashi, Nagisa Ishiura, Shuzo Yajima
1990DACCoded Time-Symbolic Simulation Using Shared Binary Decision Diagram.Nagisa Ishiura, Yutaka Deguchi, Shuzo Yajima
1990DACNES: The Behavioral Model for the Formal Semantics of a Hardware Design Language UDL/I.Nagisa Ishiura, Hiroto Yasuura, Shuzo Yajima
1990DACShared Binary Decision Diagram with Attributed Edges for Efficient Boolean function Manipulation.Shin-ichi Minato, Nagisa Ishiura, Shuzo Yajima
1990ICCDFormal semantics of UDL/I and its applications to CAD/DA tools.Hiroto Yasuura, Nagisa Ishiura
1989DACTime-Symbolic Simulation for Accurate Timing Verification of Asynchronous Behavior of Logic Circuits.Nagisa Ishiura, Mizuki Takahashi, Shuzo Yajima
1989DACSemantics of a Hardware Design Language for Japanese Standardization.Hiroto Yasuura, Nagisa Ishiura