Nagu R. Dhanwada
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
15
Venues
9
Active years
1998–2021
Best venue rank
A*
Where they publish
Papers
15 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2021 | ISCA | Energy Efficiency Boost in the AI-Infused POWER10 Processor. | Brian W. Thompto, Dung Q. Nguyen, Jos E. Moreira, Ramon Bertran, Hans M. Jacobson, Richard J. Eickemeyer, Rahul M. Rao, Michael Goulet, Marcy Byers, Christopher J. Gonzalez, Karthik Swaminathan, Nagu R. Dhanwada, Silvia M. Mller, Andreas Wagner, Satish Kumar Sadasivam, Robert K. Montoye, William J. Starke, Christian G. Zoellin, Michael S. Floyd, Jeffrey Stuecheli, Nandhini Chandramoorthy, John-David Wellman, Alper Buyuktosunoglu, Matthias Pflanz, Balaram Sinharoy, Pradip Bose |
| 2019 | VLSID | Heterogeneity Aware Power Abstraction for Hierarchical Power Analysis. | Arun Joseph, Spandana Rachamalla, Shashidhar Reddy, Nagu R. Dhanwada |
| 2014 | ICCAD | Towards a standard flow for system level power modeling. | Nagu R. Dhanwada, William Rhett Davis, Jerry Frenkil |
| 2014 | VLSID | Process Synchronization in Multi-core Systems Using On-Chip Memories. | Arun Joseph, Nagu R. Dhanwada |
| 2013 | ICCAD | Efficient PVT independent abstraction of large IP blocks for hierarchical power analysis. | Nagu R. Dhanwada, David J. Hathaway, Victor V. Zyuban, Peng Peng, Karl Moody, William W. Dungan, Arun Joseph, Rahul M. Rao, Christopher J. Gonzalez |
| 2008 | ASPDAC | Exploring power management in multi-core systems. | Reinaldo A. Bergamaschi, Guoling Han, Alper Buyuktosunoglu, Hiren D. Patel, Indira Nair, Gero Dittmann, Geert Janssen, Nagu R. Dhanwada, Zhigang Hu, Pradip Bose, John A. Darringer |
| 2005 | ICCD | Temperature-Aware Voltage Islands Architecting in System-on-Chip Design. | Wei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vijaykrishnan, Nagu R. Dhanwada, John Conner |
| 2004 | ISLPED | Architecting voltage islands in core-based system-on-a-chip designs. | Jingcao Hu, Youngsoo Shin, Nagu R. Dhanwada, Radu Marculescu |
| 2000 | ISCAS | A heuristic technique for system-level architecture generation from signal-flow graph representations of analog systems. | Alex Doboli, Nagu R. Dhanwada, Ranga Vemuri |
| 1999 | ASPDAC | Automatic Constraint Transformation with Integrated Parameter Space Exploration in Analog System Synthesis. | Nagu R. Dhanwada, Adrin Nez-Aldana, Ranga Vemuri |
| 1999 | DAC | Behavioral Synthesis of Analog Systems Using Two-layered Design Space Exploration. | Alex Doboli, Adrin Nez-Aldana, Nagu R. Dhanwada, Sree Ganesan, Ranga Vemuri |
| 1999 | DATE | Hierarchical Constraint Transformation Using Directed Interval Search for Analog System Synthesis. | Nagu R. Dhanwada, Adrin Nez-Aldana, Ranga Vemuri |
| 1999 | ISCAS | A genetic approach to simultaneous parameter space exploration and constraint transformation in analog synthesis. | Nagu R. Dhanwada, Adrin Nez-Aldana, Ranga Vemuri |
| 1999 | VLSID | Component Characterization and Constraint Transformation Based on Directed Intervals for Analog Synthesis. | Nagu R. Dhanwada, Adrin Nez-Aldana, Ranga Vemuri |
| 1998 | VLSID | Constraint Allocation in Analog System Synthesis. | Nagu R. Dhanwada, Ranga Vemuri |