Natalino G. Bus
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
3
Active years
2001–2002
Best venue rank
C
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2002 | RSP | RAPIDO: A Modular, Multi-Board, Heterogeneous Multi-Processor, PCI Bus Based Prototyping Framework for the Validation of SoC VLSI Designs. | Natalino G. Bus, Ghiath Alkadi, Michael J. Verberne, Rafael Peset Llopis, Sethuraman Ramanatha |
| 2001 | DATE | Functional units with conditional input/output behavior in VLIW processors. | Marco Bekooij, Loek J. M. Engels, Albert van der Werf, Natalino G. Bus |
| 2001 | VLSID | Synthesizing A Long Latency Unit Within Vliw Processor. | Ram Lakhan Gupta, Anshul Kumar, Albert van der Werf, Natalino G. Bus |