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Nishil Talati

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

18

Venues

11

Active years

2015–2026

Best venue rank

A*

Where they publish

Papers

18 indexed papers, newest first.

YearVenueTitleAuthors
2026ASPLOSMoDM: Efficient Serving for Image Generation via Mixture-of-Diffusion Models.Yuchen Xia, Divyam Sharma, Yichao Yuan, Souvik Kundu, Nishil Talati
2026HPDCMoE-Lens: Towards the Hardware Limit of High-Throughput MoE LLM Serving Under Resource Constraints.Yichao Yuan, Lin Ma, Nishil Talati
2025HPCAMulti-Dimensional Vector ISA Extension for Mobile In-Cache Computing.Alireza Khadem, Daichi Fujiki, Hilbert Chen, Yufeng Gu, Nishil Talati, Scott A. Mahlke, Reetuparna Das
2025HPCAPalermo: Improving the Performance of Oblivious Memory using Protocol-Hardware Co-Design.Haojie Ye, Yuchen Xia, Yuhan Chen, Kuan-Yu Chen, Yichao Yuan, Shuwen Deng, Baris Kasikci, Trevor N. Mudge, Nishil Talati
2025ISCADX100: Programmable Data Access Accelerator for Indirection.Alireza Khadem, Kamalavasan Kamalakkannan, Zhenyan Zhu, Akash Poptani, Yufeng Gu, Jered Benjamin Dominguez-Trujillo, Nishil Talati, Daichi Fujiki, Scott A. Mahlke, Galen M. Shipman, Reetuparna Das
2025ISCANMP-PaK: Near-Memory Processing Acceleration of Scalable De Novo Genome Assembly.Heewoo Kim, Sanjay Sri Vallabh Singapuram, Haojie Ye, Joseph Izraelevitz, Trevor N. Mudge, Ronald G. Dreslinski, Nishil Talati
2024ICDMAccurate and Fast Estimation of Temporal Motifs Using Path Sampling.Yunjie Pan, Omkar Bhalerao, C. Seshadhri, Nishil Talati
2024ISCAQUETZAL: Vector Acceleration Framework for Modern Genome Sequence Analysis Algorithms.Julian Pavon, Ivn Vargas Valdivieso, Carlos Rojas, Csar Hernndez, Mehmet Aslan, Roger Figueras, Yichao Yuan, Jol Lindegger, Mohammed Alser, Francesc Moll, Santiago Marco-Sola, Oguz Ergin, Nishil Talati, Onur Mutlu, Osman S. Unsal, Mateo Valero, Adrin Cristal
2023ASPLOSGRACE: A Scalable Graph-Based Approach to Accelerating Recommendation Model Inference.Haojie Ye, Sanketh Vedula, Yuhan Chen, Yichen Yang, Alex M. Bronstein, Ronald G. Dreslinski, Trevor N. Mudge, Nishil Talati
2023DATEPEDAL: A Power Efficient GCN Accelerator with Multiple DAtafLows.Yuhan Chen, Alireza Khadem, Xin He, Nishil Talati, Tanvir Ahmed Khan, Trevor N. Mudge
2023ISLPEDRecPIM: A PIM-Enabled DRAM-RRAM Hybrid Memory System For Recommendation Models.Heewoo Kim, Haojie Ye, Trevor N. Mudge, Ronald G. Dreslinski, Nishil Talati
2022ISCANDMiner: accelerating graph pattern mining using near data processing.Nishil Talati, Haojie Ye, Yichen Yang, Leul Belayneh, Kuan-Yu Chen, David T. Blaauw, Trevor N. Mudge, Ronald G. Dreslinski
2022MICROMint: An Accelerator For Mining Temporal Motifs.Nishil Talati, Haojie Ye, Sanketh Vedula, Kuan-Yu Chen, Yuhan Chen, Daniel Liu, Yichao Yuan, David T. Blaauw, Alex M. Bronstein, Trevor N. Mudge, Ronald G. Dreslinski
2021HPCAProdigy: Improving the Memory Latency of Data-Indirect Irregular Workloads Using Hardware-Software Co-Design.Nishil Talati, Kyle May, Armand Behroozi, Yichen Yang, Kuba Kaszyk, Christos Vasiladiotis, Tarunesh Verma, Lu Li, Brandon Nguyen, Jiawen Sun, John Magnus Morton, Agreen Ahmadi, Todd M. Austin, Michael F. P. O'Boyle, Scott A. Mahlke, Trevor N. Mudge, Ronald G. Dreslinski
2018DATEPractical challenges in delivering the promises of real processing-in-memory machines.Nishil Talati, Ameer Haj Ali, Rotem Ben Hur, Nimrod Wald, Ronny Ronen, Pierre-Emmanuel Gaillardon, Shahar Kvatinsky
2017ICCADSimple magic: Synthesis and in-memory Mapping of logic execution for memristor-aided logic.Rotem Ben Hur, Nimrod Wald, Nishil Talati, Shahar Kvatinsky
2017ISCASRate-compatible and high-throughput architecture designs for encoding LDPC codes.Nishil Talati, Zhiying Wang, Shahar Kvatinsky
2015VLSIDImplementation of NOR Logic Based on Material Implication on CMOL FPGA Architecture.Pravin Mane, Nishil Talati, Ameya Riswadkar, Bhavan Jasani, C. K. Ramesha