| 1988 | DAC | Logic Simulation System Using Simulation Processor (SP). | Minoru Saitoh, Kenji Iwata, Akiko Nokamura, Makoto Kakegawa, Junichi Masuda, Hirofumi Hamamura, Fumiyasu Hirose, Nobuaki Kawato |
| 1988 | ICCAD | Evaluation and improvement of Boolean comparison method based on binary decision diagrams. | Masahiro Fujita, Hisanori Fujisawa, Nobuaki Kawato |
| 1988 | ITC | A Method to Generate Tests for Combinational Logic Circuits Using an Ultra-High-Speed Logic Simulator. | Fumiyasu Hirose, Koichiro Takayama, Nobuaki Kawato |
| 1986 | DAC | A rule-based logic circuit synthesis system for CMOS gate arrays. | Takao Saito, Hiroyuki Sugimoto, Masami Yamazaki, Nobuaki Kawato |
| 1982 | DAC | An interactive logic synthesis system based upon AI techniques. | Nobuaki Kawato, Takao Uehara, Sadaki Hirose, Takao Saito |
| 1982 | DAC | A verification technique for hardware designs. | Fumihiro Maruyama, Takao Uehara, Nobuaki Kawato, Takao Saito |
| 1981 | DAC | A CAD system for logic design based on frames and demons. | Takao Saito, Takao Uehara, Nobuaki Kawato |
| 1979 | DAC | Design and verification of large-scale computers by using DDL. | Nobuaki Kawato, Takao Saito, Fumihiro Maruyama, Takao Uehara |