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Ondrej Cekan

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

13

Venues

2

Active years

2014–2020

Best venue rank

C

Where they publish

Papers

13 indexed papers, newest first.

YearVenueTitleAuthors
2020DDECSAutomatic Design of Reliable Systems Based on the Multiple-choice Knapsack Problem.Jakub Lojda, Jakub Podivinsky, Ondrej Cekan, Richard Panek, Martin Krcma, Zdenek Kotsek
2020DSDHardening of Smart Electronic Lock Software against Random and Deliberate Faults.Jakub Lojda, Richard Panek, Jakub Podivinsky, Ondrej Cekan, Martin Krcma, Zdenek Kotsek
2019DSDTesting Reliability of Smart Electronic Locks: Analysis and the First Steps Towards.Ondrej Cekan, Jakub Podivinsky, Jakub Lojda, Richard Panek, Martin Krcma, Zdenek Kotsek
2019DSDMultidimensional Pareto Frontiers Intersection Determination and Processor Optimization Case Study.Jakub Podivinsky, Ondrej Cekan, Martin Krcma, Radek Burget, Tomas Hruska, Zdenek Kotsek
2018DSDProgram Generation Through a Probabilistic Constrained Grammar.Ondrej Cekan, Jakub Podivinsky, Zdenek Kotsek
2018DSDFT-EST Framework: Reliability Estimation for the Purposes of Fault-Tolerant System Design Automation.Jakub Lojda, Jakub Podivinsky, Ondrej Cekan, Richard Panek, Zdenek Kotsek
2018DSDEvaluation Platform for Testing Fault Tolerance Properties: Soft-core Processor-Based Experimental Robot Controller.Jakub Podivinsky, Jakub Lojda, Ondrej Cekan, Zdenek Kotsek
2017DSDA Probabilistic Context-Free Grammar Based Random Test Program Generation.Ondrej Cekan, Zdenek Kotsek
2017DSDReliability Analysis and Improvement of FPGA-Based Robot Controller.Jakub Podivinsky, Jakub Lojda, Ondrej Cekan, Richard Panek, Zdenek Kotsek
2016DSDVerification of Robot Controller for Evaluating Impacts of Faults in Electro-Mechanical Systems.Jakub Podivinsky, Ondrej Cekan, Jakub Lojda, Zdenek Kotsek
2015DDECSFPGA Prototyping and Accelerated Verification of ASIPs.Jakub Podivinsky, Marcela Simkov, Ondrej Cekan, Zdenek Kotsek
2015DSDSoftware Fault Tolerance: The Evaluation by Functional Verification.Ondrej Cekan, Jakub Podivinsky, Zdenek Kotsek
2014DSDThe Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-Mechanical Applications.Jakub Podivinsky, Ondrej Cekan, Marcela Simkov, Zdenek Kotsek