P. R. Suresh
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
1
Active years
1995–2004
Best venue rank
National
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2004 | VLSID | Package-silicon co-design - Experiment with an SOC design. | P. R. Suresh, P. K. Sundararajan, Anshuli Goel, H. Udayakumar, C. Srinivasan, Vasudev Sinari, Raghavendrakumar Ravinutala |
| 2002 | VLSID | Transistor Flaring in Deep Submicron-Design Considerations. | Vipul Singhal, C. B. Keshav, K. G. Surnanth, P. R. Suresh |
| 2001 | VLSID | Integrated Crosstalk And Oxide Integrity Analysis In Dsm Designs. | N. V. Arvind, P. R. Suresh, V. Sivakumar, Chandrani Pal, Debaprasad Das |
| 1995 | VLSID | A simulation study on the effectiveness of n-guardring/p-guardring on latchup in 0.8 μm CMOS technology. | Varna Puvvada, S. Potla, S. Tamizh Selvam, P. R. Suresh |