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PariVallal Kannan

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

10

Venues

5

Active years

1998–2016

Best venue rank

A*

Where they publish

Papers

10 indexed papers, newest first.

YearVenueTitleAuthors
2016ICCADPerformance driven routing for modern FPGAs.PariVallal Kannan, Satish Sivaswamy
2004VLSIDEstimating Pre-Placement FPGA Interconnection Requirements.PariVallal Kannan, Dinesh Bhatia
2003ICCDInterconnect Estimation for FPGAs under Timing Driven Domains.PariVallal Kannan, Dinesh Bhatia
2002DACOn metrics for comparing routability estimation methods for FPGAs.PariVallal Kannan, Shankar Balachandran, Dinesh Bhatia
2002FPLRapid and Reliable Routability Estimation for FPGAs.PariVallal Kannan, Shankar Balachandran, Dinesh Bhatia
2002VLSIDOn Routing Demand and Congestion Estimation for FPGAs.Shankar Balachandran, PariVallal Kannan, Dinesh Bhatia
2001FPLTightly Integrated Placement and Routing for FPGAs.PariVallal Kannan, Dinesh Bhatia
2001FPLfGREP - Fast Generic Routing Demand Estimation for Placed FPGA Circuits.PariVallal Kannan, Shankar Balachandran, Dinesh Bhatia
1999FPLNEBULA: A Partially and Dynamically Reconfigurable Architecture.Dinesh Bhatia, Kuldeep S. Simha, PariVallal Kannan
1998FPLREACT: Reactive Environment for Runtime Reconfiguration.Dinesh Bhatia, PariVallal Kannan, Kuldeep S. Simha, Karthikeya M. Gajjala Purna