Paul Teehan
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2009–2009
Best venue rank
A
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2009 | FPGA | Towards reliable 5Gbps wave-pipelined and 3Gbps surfing interconnect in 65nm FPGAs. | Paul Teehan, Guy G. Lemieux, Mark R. Greenstreet |