| 2013 | DATE | Mutation analysis with coverage discounting. | Peter Lisherness, Nicole Lesperance, Kwang-Ting (Tim) Cheng |
| 2012 | ASPDAC | On error modeling of electrical bugs for post-silicon timing validation. | Ming Gao, Peter Lisherness, Kwang-Ting Cheng, Jing-Jia Liou |
| 2012 | ASPDAC | Improving validation coverage metrics to account for limited observability. | Peter Lisherness, Kwang-Ting Cheng |
| 2012 | ASPDAC | Post-fabrication reconfiguration for power-optimized tuning of optically connected multi-core systems. | Yan Zheng, Peter Lisherness, Saeed Shamshiri, Amirali Ghofrani, Shiyuan Yang, Kwang-Ting Cheng |
| 2012 | DATE | Power-efficient calibration and reconfiguration for on-chip optical communication. | Yan Zheng, Peter Lisherness, Ming Gao, Jock Bovington, Shiyuan Yang, Kwang-Ting Cheng |
| 2012 | ITC | Adaptive test selection for post-silicon timing validation: A data mining approach. | Ming Gao, Peter Lisherness, Kwang-Ting (Tim) Cheng |
| 2011 | ASPDAC | Post-silicon bug detection for variation induced electrical bugs. | Ming Gao, Peter Lisherness, Kwang-Ting (Tim) Cheng |
| 2010 | DAC | SCEMIT: a systemc error and mutation injection tool. | Peter Lisherness, Kwang-Ting (Tim) Cheng |
| 2008 | ITC | A Cost Analysis Framework for Multi-core Systems with Spares. | Saeed Shamshiri, Peter Lisherness, Sung-Jui (Song-Ra) Pan, Kwang-Ting Cheng |