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Pey-Chang Kent Lin

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

6

Venues

3

Active years

2011–2015

Best venue rank

A*

Where they publish

Papers

6 indexed papers, newest first.

YearVenueTitleAuthors
2015ICCADEfficient Transistor-Level Symbolic Timing Simulation Using Cached Partial Circuit States.Clayton B. McDonald, Hsinwei Chou, Vijay Durairaj, Pey-Chang Kent Lin
2013ICCDNoise-based algorithms for functional equivalence and tautology checking.Pey-Chang Kent Lin, Sunil P. Khatri
2012DACApplication of logic synthesis to the understanding and cure of genetic diseases.Pey-Chang Kent Lin, Sunil P. Khatri
2012DACBoolean satisfiability using noise based logic.Pey-Chang Kent Lin, Ayan Mandal, Sunil P. Khatri
2012ICCDTiming aware partitioning for multi-FPGA based logic simulation using top-down selective hierarchy flattening.Subramanian Poothamkurissi Swaminathan, Pey-Chang Kent Lin, Sunil P. Khatri
2011ICCDA novel cryptographic key exchange scheme using resistors.Pey-Chang Kent Lin, Alex Ivanov, Bradley Johnson, Sunil P. Khatri