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Philip Colangelo

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

6

Venues

4

Active years

2017–2020

Best venue rank

National

Where they publish

Papers

6 indexed papers, newest first.

YearVenueTitleAuthors
2020ISCASSparse Persistent GEMM Accelerator using OpenCL for Intel FPGAs.Philip Colangelo, Shayan Sengupta, Martin Margala
2018FCCMExploration of Low Numeric Precision Deep Learning Inference Using Intel FPGAs.Philip Colangelo, Nasibeh Nasiri, Eriko Nurvitadhi, Asit K. Mishra, Martin Margala, Kevin Nealis
2018FPGAExploration of Low Numeric Precision Deep Learning Inference Using Intel FPGAs: (Abstract Only).Philip Colangelo, Nasibeh Nasiri, Eriko Nurvitadhi, Asit K. Mishra, Martin Margala, Kevin Nealis
2018FPGAIn-Package Domain-Specific ASICs for Intel Stratix 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC(Abstract Only).Eriko Nurvitadhi, Jeffrey J. Cook, Asit K. Mishra, Debbie Marr, Kevin Nealis, Philip Colangelo, Andrew C. Ling, Davor Capalija, Utku Aydonat, Sergey Y. Shumarayev, Aravind Dasu
2018FPLIn-Package Domain-Specific ASICs for Intel Stratix 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC.Eriko Nurvitadhi, Jeffrey J. Cook, Asit K. Mishra, Debbie Marr, Kevin Nealis, Philip Colangelo, Andrew C. Ling, Davor Capalija, Utku Aydonat, Aravind Dasu, Sergey Y. Shumarayev
2017FCCMFine-Grained Acceleration of Binary Neural Networks Using Intel Xeon Processor with Integrated FPGA.Philip Colangelo, Randy Huang, Enno Lbbers, Martin Margala, Kevin Nealis