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Poras T. Balsara

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

39

Venues

13

Active years

1986–2024

Best venue rank

A*

Where they publish

Papers

39 indexed papers, newest first.

YearVenueTitleAuthors
2024IECONAdaptive PLL-based Sensorless Control for CSI-Fed PMSM Drives Used in Submersible Pumps.Milad Bahrami-Fard, Majid Ghasemi Korrani, Mohammad Rastegar, Poras T. Balsara, Babak Fahimi
2024IECONBifurcation Analysis under Various Modulation Techniques in PWM-Controlled DC-DC Converters.Mohammad Hassan Ghaderi, Milad Bahrami-Fard, Nasim Rashidirad, Babak Fahimi, Poras T. Balsara
2024IECONDynamic Modeling of a Double-Stator Switched Reluctance Motor (DSSRM) Using a Lumped Parameter Circuit Model.Behnam Mosammam, Milad Bahrami-Fard, Babak Fahimi, Poras T. Balsara
2024VLSIDHardware-based Detection of Malicious Firmware Modification in Microgrids.Amisha Srivastava, Sneha Thakur, Abraham Peedikayil Kuruvila, Poras T. Balsara, Kanad Basu
2023IECONFully Distributed Control of Microgrids Using Multi-Agent Approach.Vaibhav Uttam Pawaskar, Poras T. Balsara, Babak Fahimi, Ghanshyamsinh Gohil
2022ISCASA new submodule structure with parallel capacitor connection in modular multilevel converters.G. Veera Bharath, Ghanshyamsinh Gohil, Poras T. Balsara
2017BSNPortable impedance measurement device for sweat based glucose detection.Athul Asokan Thulasi, Dinesh Bhatia, Poras T. Balsara, Shalini Prasad
2016IECONEffect of sampling time and sampling instant on the frequency response of a boost converter.Sameer Arora, Poras T. Balsara, Dinesh K. Bhatia
2012VLSIDBidirectional Single-Supply Level Shifter with Wide Voltage Range for Efficient Power Management.Sujan K. Manohar, Vinod K. Somasundar, Ramakrishnan Venkatasubramanian, Poras T. Balsara
2012VLSIDHybrid NEMS-CMOS DC-DC Converter for Improved Area and Power Efficiency.Sujan K. Manohar, Ramakrishnan Venkatasubramanian, Poras T. Balsara
2011ISCASMulti-clock domain analysis and modeling of all-digital frequency synthesizers.Ioannis L. Syllaios, Poras T. Balsara
2007ISCASA Low Power and Low Quantization Noise Digital Sigma-Delta Modulator for Wireless Transmitters.Viral K. Parikh, Poras T. Balsara, Oren E. Eliezer, Jaimin Mehta
2007ISCASA Low Area and Low Power Digital Band-Pass Sigma-Delta Modulator for Wireless Transmitters.Viral K. Parikh, Poras T. Balsara, Oren E. Eliezer, Jaimin Mehta
2007ISCASEffect of Word-length Precision on the Performance of MIMO Systems.Chitranjan K. Singh, Naofal Al-Dhahir, Poras T. Balsara
2007PIMRCOn the Reconfigurability of All-Digital Phase-Locked Loops for Software Defined Radios.Ioannis L. Syllaios, Poras T. Balsara, Robert Bogdan Staszewski
2007VTCIterative (TURBO) IQ Imbalance Estimation and Correction in BICM-ID for Flat Fading Channels.Raghunath Cherukuri, Poras T. Balsara
2007VLSIDVLSI Architecture for Matrix Inversion using Modified Gram-Schmidt based QR Decomposition.Chitranjan K. Singh, Sushma Honnavara Prasad, Poras T. Balsara
2006ICCDReconfigurable CAM Architecture for Network Search Engines.Mehrdad Nourani, Deepak S. Vijayasarathi, Poras T. Balsara
2006ISCASA generalized signal reconstruction method for designing interpolation filters.Ioannis L. Syllaios, Poras T. Balsara, Oren E. Eliezer
2006VLSIDExploring Logic Block Granularity in Leakage Tolerant FPGA.Rajan Konar, Rajarshee P. Bharadwaj, Dinesh Bhatia, Poras T. Balsara
2006VLSIDA Wide-Range, High-Resolution, Compact CMOS, Time to Digital Converter.V. Ramakrishnan, Poras T. Balsara
2005ASPDACExploiting temporal idleness to reduce leakage power in programmable architectures.Rajarshee P. Bharadwaj, Rajan Konar, Poras T. Balsara, Dinesh Bhatia
2005ICCDRipple-Precharge TCAM A Low-Power Solution for Network Search Engines.Deepak S. Vijayasarathi, Mehrdad Nourani, Mohammad J. Akhbarizadeh, Poras T. Balsara
2005VLSIDThe Impact of Inductance on Transients Affecting Gate Oxide Reliability.N. S. Nagaraj, William R. Hunter, Poras T. Balsara, Cyrus D. Cantrell
2005VLSIDPower Switch Network Design for MTCMOS.Ramaprasath Vilangudipitchai, Poras T. Balsara
2004ICCDPCAM: A Ternary CAM Optimized for Longest Prefix Matching Tasks.Mohammad J. Akhbarizadeh, Mehrdad Nourani, Deepak S. Vijayasarathi, Poras T. Balsara
2004ISCASEvent-driven simulation and modeling of an RF oscillator.Robert Bogdan Staszewski, Chan Fernando, Poras T. Balsara
2004VLSIDInterconnect Modeling for Copper/Low-k Technologies.N. S. Nagaraj, Tom Bonifield, Abha Singh, Roger Griesmer, Poras T. Balsara
2002VLSIDEmbedded Tutorial: Modeling Parasitic Coupling Effects in Reliability Verification.N. S. Nagaraj, Poras T. Balsara, Cyrus D. Cantrell
2001VLSIDCrosstalk Noise Verification in Digital Designs with Interconnect Process Variations.Nagaraj Ns, Poras T. Balsara, Cyrus D. Cantrell
2000FCCMReconfigurable Array Media Processor (RAMP).Kamlesh Rath, Sirisha Tangirala, Patrick Friel, Poras T. Balsara, Jose Flores, John P. Wadley
2000ISLPEDLow power techniques and design tradeoffs in adaptive FIR filtering for PRML read channels.Khurram Muhammad, Robert Bogdan Staszewski, Poras T. Balsara
1999VLSIDMini-Tutorial: Bridging the Gap between TCAD and ECAD Methodologies in Deep Sub-Micron Interconnect Extraction and Analysis.Nagaraj Ns, Poras T. Balsara, Cyrus D. Cantrell
1998INFOCOMLAPLUS: An Efficient, Effective and Stable Switch Algorithm for Flow Control of the Available Bit Rate ATM Service.Sharat Prasad, Kamran Kiasaleh, Poras T. Balsara
1996ISLPEDDesign techniques for high performance, energy efficient control logic.Uming Ko, Anthony M. Hill, Poras T. Balsara
1996ISLPEDLeap frog multiplier.Shivaling S. Mahant-Shetti, Carl Lemonds, Poras T. Balsara
1995ISLPEDEnergy optimization of multi-level processor cache architectures.Uming Ko, Poras T. Balsara, Ashwini K. Nanda
1987ARITHSystolic & semi-systolic digit serial multipliers.Poras T. Balsara, Robert Michael Owens
1986ICASSPDesign and implementation of real time video processor.Shishpal Rawat, Poras T. Balsara, Mary Jane Irwin, Tom Mackowiak