Priyadharshini Shanmugasundaram
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
2
Active years
2011–2012
Best venue rank
National
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2012 | VLSID | Externally Tested Scan Circuit with Built-In Activity Monitor and Adaptive Test Clock. | Priyadharshini Shanmugasundaram, Vishwani D. Agrawal |
| 2011 | VTS | An efficient test data reduction technique through dynamic pattern mixing across multiple fault models. | Srinivasulu Alampally, R. T. Venkatesh, Priyadharshini Shanmugasundaram, Rubin A. Parekhji, Vishwani D. Agrawal |
| 2011 | VTS | Dynamic scan clock control for test time reduction maintaining peak power limit. | Priyadharshini Shanmugasundaram, Vishwani D. Agrawal |