Qijing Huang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
19
Venues
12
Active years
2013–2025
Best venue rank
A*
Where they publish
Papers
19 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | ASPDAC | DEMOTIC: A Differentiable Sampler for Multi-Level Digital Circuits. | Arash Ardakani, Minwoo Kang, Kevin He, Qijing Huang, Vighnesh M. Iyer, Suhong Moon, John Wawrzynek |
| 2025 | DATE | High-Throughput SAT Sampling. | Arash Ardakani, Minwoo Kang, Kevin He, Qijing Huang, John Wawrzynek |
| 2025 | DATE | ChipVQA: Benchmarking Visual Language Models for Chip Design. | Haoyu Yang, Qijing Huang, Nathaniel Ross Pinckney, Walker J. Turner, Wenfei Zhou, Yanqing Zhang, Chia-Tung Ho, Chen-Chia Chang, Haoxing Ren |
| 2024 | ISCA | Mind the Gap: Attainable Data Movement and Operational Intensity Bounds for Tensor Algorithms. | Qijing Huang, Po-An Tsai, Joel S. Emer, Angshuman Parashar |
| 2023 | MICRO | DOSA: Differentiable Model-Based One-Loop Search for DNN Accelerators. | Charles Hong, Qijing Huang, Grace Dinh, Mahesh Subedar, Yakun Sophia Shao |
| 2022 | ISPASS | Learning A Continuous and Reconstructible Latent Space for Hardware Accelerator Design. | Qijing Huang, Charles Hong, John Wawrzynek, Mahesh Subedar, Yakun Sophia Shao |
| 2021 | FCCM | HAO: Hardware-aware Neural Architecture Optimization for Efficient Inference. | Zhen Dong, Yizhao Gao, Qijing Huang, John Wawrzynek, Hayden K. H. So, Kurt Keutzer |
| 2021 | FPGA | CoDeNet: Efficient Deployment of Input-Adaptive Object Detection on Embedded FPGAs. | Qijing Huang, Dequan Wang, Zhen Dong, Yizhao Gao, Yaohui Cai, Tian Li, Bichen Wu, Kurt Keutzer, John Wawrzynek |
| 2021 | ICML | HAWQ-V3: Dyadic Neural Network Quantization. | Zhewei Yao, Zhen Dong, Zhangcheng Zheng, Amir Gholami, Jiali Yu, Eric Tan, Leyuan Wang, Qijing Huang, Yida Wang, Michael W. Mahoney, Kurt Keutzer |
| 2021 | ISCA | CoSA: Scheduling by Constrained Optimization for Spatial Accelerators. | Qijing Huang, Aravind Kalaiah, Minwoo Kang, James Demmel, Grace Dinh, John Wawrzynek, Thomas Norell, Yakun Sophia Shao |
| 2020 | DATE | AutoCkt: Deep Reinforcement Learning of Analog Circuit Designs. | Keertana Settaluri, Ameer Haj-Ali, Qijing Huang, Kourosh Hakhamaneshi, Borivoje Nikolic |
| 2020 | RTAS | BRU: Bandwidth Regulation Unit for Real-Time Multicore Processors. | Farzad Farshchi, Qijing Huang, Heechul Yun |
| 2019 | FCCM | AutoPhase: Compiler Phase-Ordering for HLS with Deep Reinforcement Learning. | Qijing Huang, Ameer Haj-Ali, William S. Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek |
| 2019 | FPGA | Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs. | Yifan Yang, Qijing Huang, Bichen Wu, Tianjun Zhang, Liang Ma, Giulio Gambardella, Michaela Blott, Luciano Lavagno, Kees A. Vissers, John Wawrzynek, Kurt Keutzer |
| 2019 | HPCA | FPGA Accelerated INDEL Realignment in the Cloud. | Lisa Wu, David Bruns-Smith, Frank A. Nothaft, Qijing Huang, Sagar Karandikar, Johnny Le, Andrew Lin, Howard Mao, Brendan Sweeney, Krste Asanovic, David A. Patterson, Anthony D. Joseph |
| 2019 | ICCAD | Centrifuge: Evaluating full-system HLS-generated heterogenous-accelerator SoCs using FPGA-Acceleration. | Qijing Huang, Christopher Yarp, Sagar Karandikar, Nathan Pemberton, Benjamin Brock, Liang Ma, Guohao Dai, Robert Quitt, Krste Asanovic, John Wawrzynek |
| 2018 | ISCA | FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud. | Sagar Karandikar, Howard Mao, Donggyu Kim, David Biancolin, Alon Amid, Dayeol Lee, Nathan Pemberton, Emmanuel Amaro, Colin Schmidt, Aditya Chopra, Qijing Huang, Kyle Kovacs, Borivoje Nikolic, Randy H. Katz, Jonathan Bachrach, Krste Asanovic |
| 2013 | CASES | From software to accelerators with LegUp high-level synthesis. | Andrew Canis, Jongsok Choi, Blair Fort, Ruolong Lian, Qijing Huang, Nazanin Calagar, Marcel Gort, Jia Jun Qin, Mark Aldham, Tomasz S. Czajkowski, Stephen Brown, Jason Helge Anderson |
| 2013 | FCCM | The Effect of Compiler Optimizations on High-Level Synthesis for FPGAs. | Qijing Huang, Ruolong Lian, Andrew Canis, Jongsok Choi, Ryan Xi, Stephen Brown, Jason Helge Anderson |