| 2026 | HPCA | ASPA: Reassigning DDR5 Parity Bandwidth. | Fan Li, Qiufeng Li, Yanan Guo, Weidong Cao, Xin Xin |
| 2025 | ICCAD | Invited Paper: Multi-Agent Generative Synthesis for Analog/RF Circuit: from Scalable Topology Generation to Efficient Inverse Design. | Shikai Wang, Qiufeng Li, Houbo He, Jian Gao, Zining Wang, Yu Sun, Xuan Zhang, Taiyun Chi, Weidong Cao |
| 2025 | ISLPED | A Scalable External Memory Access and On-Chip Storage Architecture for Edge-AI Accelerators : - Multi-Path Rolling Data Refresh and Layer-Wise Bank Allocation -. | Quan Cheng, Huizi Zhang, Qiufeng Li, Yuan Liang, Mingtao Zhang, Zhenzhe Chen, Ruilin Zhang, Jinjun Xiong, Mingqiang Huang, Longyang Lin, Masanori Hashimoto |
| 2025 | ISLPED | Unicorn-CIM: Unconvering the Vulnerability and Improving the Resilience of High-Precision Compute-in-Memory. | Qiufeng Li, Yiwen Liang, Weidong Cao |
| 2024 | DAC | How accurately can soft error impact be estimated in black-box/white-box cases? - a case study with an edge AI SoC -. | Quan Cheng, Qiufeng Li, Longyang Lin, Wang Liao, Liuyao Dai, Hao Yu, Masanori Hashimoto |
| 2023 | ASPDAC | Agile Hardware and Software Co-Design for RISC-V-Based Multi-Precision Deep Learning Microprocessor. | Zicheng He, Ao Shen, Qiufeng Li, Quan Cheng, Hao Yu |
| 2022 | FPGA | A High Throughput Multi-bit-width 3D Systolic Accelerator for NAS Optimized Deep Neural Networks on FPGA. | Mingqiang Huang, Yucen Liu, Quan Cheng, Shuxin Yang, Kai Li, Junyi Luo, Zhengke Yang, Qiufeng Li, Hao Yu, Changhai Man |