R. R. Manikandan
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
1
Active years
2017–2021
Best venue rank
National
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2021 | VLSID | 150nA IQ, Quad Input - Quad Output, Intelligent Integrated Power Management for IoT Applications. | Vipul Singhal, Rajat Chauhan, Vinod Menezes, R. R. Manikandan, Raveesh Magod, Mahesh Mehendale, Anantha P. Chandrakasan |
| 2018 | VLSID | A 1.2 pJ/cycle KHz Timer Circuit for Heavily Duty-Cycled Systems. | R. R. Manikandan, Vipul Kumar Singhal, Rajat Chauhan, Vinod Menezes, Mahesh Mehendale |
| 2017 | VLSID | A High Performance Switchable Multiband Inductor Structure for LC-VCOs. | R. R. Manikandan, Venkata Narayana Rao Vanukuru |