Skip to content

Rajeev Jain

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

24

Venues

10

Active years

1984–2025

Best venue rank

A*

Where they publish

Papers

24 indexed papers, newest first.

YearVenueTitleAuthors
2025SCA Workflow for Error Analysis for Drug Response Prediction via Statistical Standardization and Distribution Analysis.Jake Gwinn, Justin M. Wozniak, Rajeev Jain, Yitan Zhu, Alexander Partin, Thomas S. Brettin, Rick Stevens
2024AISTATSDE-HNN: An effective neural model for Circuit Netlist representation.Zhishang Luo, Truong Son Hy, Puoya Tabaghi, Michal Defferrard, Elahe Rezaei, Ryan Carey, W. Rhett Davis, Rajeev Jain, Yusu Wang
2024DACLess is More: Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits.Chenhui Deng, Zichao Yue, Cunxi Yu, Gokce Sarar, Ryan Carey, Rajeev Jain, Zhiru Zhang
2024SCEnabling Data Reduction for Flash-X Simulations.Rajeev Jain, Houjun Tang, Akash Dhruv, Suren Byna
2021ICCADFast and Accurate PPA Modeling with Transfer Learning.W. Rhett Davis, Paul D. Franzon, Luis Francisco, Billy Huggins, Rajeev Jain
2018DACEfficient reinforcement learning for automating human decision-making in SoC design.Shankar Sadasivam, Zhuo Chen, Jinwon Lee, Rajeev Jain
1998VLSIDPanel: Challenges for Future Systems on a Chip.Rajeev Jain
1998VLSIDSimulation and Synthesis of VLSI Communication Systems.Rajeev Jain, Charles Chien, Etan G. Cohen, Leader Ho
1996ISLPEDA low power architecture for wireless multimedia systems: lessons learned from building a power hog.William H. Mangione-Smith, Phil Seong Ghang, Sean Nazareth, Paul Lettieri, Walt Boring, Rajeev Jain
1996VLSIDVLSI in Mobile Communication.Robert W. Brodersen, Rajeev Jain
1995FPGATechniques for FPGA Implementation of Video Compression Systems.Brian Schoner, John D. Villasenor, Steve Molloy, Rajeev Jain
1994ICIPAn Algorithm-Driven Processor Design for Video Compression.Steve Molloy, Brian Schoner, Avanindra Madisetti, Rajeev Jain, Roy Matic
1993VLSIDAn Integrated Technology CAD System for Process and Device Designers.K. S. V. Gopalarao, Uttiya Dasgupta, Rajeev Jain, Duane S. Boning, Purnendu K. Mozumder, V. Chandramouli
1992DCCReal Time Implementation of Pruned Tree Search Vector Quantization.Avanindra Madisetti, Rajeev Jain, Richard L. Baker
1992ICASSPHi-PASS: a computer-aided synthesis system for maximally parallel digital signal processing ASICs.Philip Duncan, Shobana Swamy, Steve Sprouse, Daniel Potasz, Rajeev Jain, Neal M. Gafter, William Cammack, Yiwan Wong, Wanda Gass
1992ICASSPDecimation filter compiler for oversampling A/D applications.Soei-Shin Hang, Rajeev Jain
1992ICASSPArchitectures and integrated circuits for real time vector quantization of images.Avanindra Madisetti, Rajeev Jain, Richard L. Baker, Raffi Dianysian
1991ICASSPComputer-aided design of high-speed lattice wave digital filter integrated circuits.Lynette Liu, Toshiaki Yoshino, Steven Sprouse, Rajeev Jain
1990ICASSPA functional silicon compiler for high speed FIR digital filters.Paul T. Yang, Rajeev Jain, Toshiaki Yoshino, Wanda Gass, Ashwin Shah
1989ICCADFDT-a design tool for switched capacitor filters.Sattam Dasgupta, Mahesh Mehendale, V. R. Sudershan, Rajeev Jain, Nagaraj Subramanyam, James Hochschild
1988ICASSPAn ASIC architecture for contour line filtering.Francky Catthoor, Lawrence O'Gorman, Rajeev Jain
1986ICASSPA fast adder-based multiplication unit for customised digital signal processors.Luc de Vos, Rajeev Jain, Hugo De Man, Walter Ulbrich
1985ICASSPCAD Tools for the optimized design of custom VLSI wave digital filters.Rajeev Jain, Gert Goossens, Luc J. M. Claesen, Joos Vandewalle, Hugo De Man, L. Gazsi, Alfred Fettweis
1984ICASSPEfficient CAD tools for the coefficient optimisation of arbitrary integrated digital filters.Rajeev Jain, Joos Vandewalle, Hugo De Man