Rajendra P. Shukla
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2024–2024
Best venue rank
National
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2024 | VLSID | Design of MoS2 based Inverter Circuits considering Interface Trap effect. | S. Sarath, Darshni Manekar, Rajendra P. Shukla, Chandan Yadav |