Rajit Manohar
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
33
Venues
23
Active years
1998–2025
Best venue rank
A*
Where they publish
Papers
33 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | DAC | PipeLink: A Pipelined Resource Sharing System for Dataflow High-Level Synthesis. | Rui Li, Lincoln Berkley, Rajit Manohar |
| 2025 | FPGA | PipeLink: A Pipelined Resource Sharing System for Dataflow High-Level Synthesis. | Rui Li, Rajit Manohar |
| 2025 | SPAA | Dataflow-Specific Algorithms for Resource-Constrained Scheduling and Memory Design. | Abhishek Bhattacharjee, Quanquan C. Liu, Rajit Manohar, Raghavendra Pradyumna Pothukuchi, Muhammed Ugur |
| 2024 | DATE | Designing an Energy-Efficient Fully-Asynchronous Deep Learning Convolution Engine. | Mattia Vezzoli, Lukas Nel, Kshitij Bhardwaj, Rajit Manohar, Maya B. Gokhale |
| 2024 | UC | High Quality Circuit-Based 3-SAT Mappings for Oscillator Ising Machines. | Venkata Pavan Sumanth Sikhakollu, Shreesha Sreedhara, Rajit Manohar, Alan Mishchenko, Jaijeet Roychowdhury |
| 2023 | ISCA | SCALO: An Accelerator-Rich Distributed System for Scalable Brain-Computer Interfacing. | Karthik Sriram, Raghavendra Pradyumna Pothukuchi, Michal Gerasimiuk, Muhammed Ugur, Oliver Ye, Rajit Manohar, Anurag Khandelwal, Abhishek Bhattacharjee |
| 2022 | ASPDAC | SPRoute 2.0: A detailed-routability-driven deterministic parallel global router with soft capacity. | Jiayuan He, Udit Agarwal, Yihang Yang, Rajit Manohar, Keshav Pingali |
| 2021 | HotOS | Zerializer: towards zero-copy serialization. | Adam Wolnikowski, Stephen Ibanez, Jonathan Stone, Changhoon Kim, Rajit Manohar, Robert Soul |
| 2020 | ICCAD | Dali: A Gridded Cell Placement Flow. | Yihang Yang, Jiayuan He, Rajit Manohar |
| 2020 | ISCA | Hardware-Software Co-Design for Brain-Computer Interfaces. | Ioannis Karageorgos, Karthik Sriram, Jn Vesel, Michael Wu, Marc Powell, David A. Borton, Rajit Manohar, Abhishek Bhattacharjee |
| 2019 | ICCAD | SPRoute: A Scalable Parallel Negotiation-based Global Router. | Jiayuan He, Martin Burtscher, Rajit Manohar, Keshav Pingali |
| 2017 | FPGA | Accelerating Face Detection on Programmable SoC Using C-Based Synthesis. | Nitish Kumar Srivastava, Steve Dai, Rajit Manohar, Zhiru Zhang |
| 2017 | IJCNN | DeepRecon: Dynamically reconfigurable architecture for accelerating deep neural networks. | Tayyar Rzayev, Saber Moradi, David H. Albonesi, Rajit Manohar |
| 2017 | ISPASS | Toolbox for exploration of energy-efficient event processors for human-computer interaction. | Tayyar Rzayev, David H. Albonesi, Franois Guimbretire, Rajit Manohar, Jaeyeon Kihm |
| 2017 | PODC | On Using Time Without Clocks via Zigzag Causality. | Asa Dan, Rajit Manohar, Yoram Moses |
| 2015 | ISCAS | Design of a QDI asynchronous AER serializer/deserializer link in 180nm for event-based sensors for robotic applications. | Giovanni Rovere, Chiara Bartolozzi, Nabil Imam, Rajit Manohar |
| 2015 | PLDI | Preventing glitches and short circuits in high-level self-timed chip specifications. | Stephen Longfield Jr., Brittany Nkounkou, Rajit Manohar, Ross Tate |
| 2014 | CHI | Using asymmetric cores to reduce power consumption for interactive devices with bi-stable displays. | Jaeyeon Kihm, Franois Guimbretire, Julia Karl, Rajit Manohar |
| 2014 | ICCAD | Removing concurrency for rapid functional verification. | Stephen Longfield Jr., Rajit Manohar |
| 2014 | SC | Real-Time Scalable Cortical Computing at 46 Giga-Synaptic OPS/Watt with ~100 Speedup in Time-to-Solution and ~100, 000 Reduction in Energy-to-Solution. | Andrew S. Cassidy, Rodrigo Alvarez-Icaza, Filipp Akopyan, Jun Sawada, John V. Arthur, Paul Merolla, Pallab Datta, Marc Gonzlez Tallada, Brian Taba, Alexander Andreopoulos, Arnon Amir, Steven K. Esser, Jeff Kusnitz, Rathinakumar Appuswamy, Chuck Haymes, Bernard Brezzo, Roger Moussalli, Ralph Bellofatto, Christian W. Baks, Michael Mastro, Kai Schleupen, Charles E. Cox, Ken Inoue, Steven E. Millman, Nabil Imam, Emmett McQuinn, Yutaka Y. Nakamura, Ivan Vo, Chen Guok, Don Nguyen, Scott Lekuch, Sameh W. Asaad, Daniel J. Friedman, Bryan L. Jackson, Myron Flickner, William P. Risk, Rajit Manohar, Dharmendra S. Modha |
| 2013 | IJCNN | Neural spiking dynamics in asynchronous digital circuits. | Nabil Imam, Kyle Wecker, Jonathan Tse, Robert Karmazin, Rajit Manohar |
| 2012 | IJCNN | Building block of a programmable neuromorphic substrate: A digital neurosynaptic core. | John V. Arthur, Paul Merolla, Filipp Akopyan, Rodrigo Alvarez-Icaza, Andrew Cassidy, Shyamal Chandra, Steven K. Esser, Nabil Imam, William P. Risk, Daniel Ben Dayan Rubin, Rajit Manohar, Dharmendra S. Modha |
| 2007 | DSN | Utilizing Dynamically Coupled Cores to Form a Resilient Chip Multiprocessor. | Christopher LaFrieda, Engin Ipek, Jos F. Martnez, Rajit Manohar |
| 2005 | FCCM | A High-Performance Asynchronous FPGA: Test Results. | David Fang, John Teifel, Rajit Manohar |
| 2005 | FPGA | Automated synthesis for asynchronous FPGAs. | Song Peng, David Fang, John Teifel, Rajit Manohar |
| 2005 | ICCD | Fault Tolerant Asynchronous Adder through Dynamic Self-reconfiguration. | Song Peng, Rajit Manohar |
| 2005 | ISCAS | Mapping system-on-chip designs from 2-D to 3-D ICs. | Christianto C. Liu, Jeng-Huei Chen, Rajit Manohar, Sandip Tiwari |
| 2004 | ASPLOS | An ultra low-power processor for sensor networks. | Virantha N. Ekanayake, Clinton Kelly IV, Rajit Manohar |
| 2004 | DSN | Fault Detection and Isolation Techniques for Quasi Delay-Insensitive Circuits. | Christopher LaFrieda, Rajit Manohar |
| 2004 | FPGA | Highly pipelined asynchronous FPGAs. | John Teifel, Rajit Manohar |
| 2003 | FPL | Programmable Asynchronous Pipeline Arrays. | John Teifel, Rajit Manohar |
| 2002 | POPL | Scalable formal design methods for asynchronous VLSI. | Rajit Manohar |
| 1998 | MPC | Slack Elasticity in Concurrent Computing. | Rajit Manohar, Alain J. Martin |