Rakesh Chadha
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
4
Active years
1988–1999
Best venue rank
A*
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1999 | DATE | Chip-Level Verification for Parasitic Coupling Effects in Deep-Submicron Digital Designs. | Lun Ye, Foong-Charn Chang, Peter Feldmann, Rakesh Chadha, Nagaraj Ns, Frank Cano |
| 1988 | DAC | Model Development and Verification for High Level Analog Blocks. | Chandramouli Visweswariah, Rakesh Chadha, Chin-Fu Chen |
| 1988 | ICCAD | M | Rakesh Chadha, Chin-Fu Chen |
| 1988 | ICCD | Extension of a transistor level digital timing simulator to include first order analog behavior. | Rakesh Chadha, Chin-Fu Chen |