Skip to content

Ram Huggahalli

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

10

Venues

8

Active years

1991–2020

Best venue rank

A*

Where they publish

Papers

10 indexed papers, newest first.

YearVenueTitleAuthors
2020MASCOTSFabsim-X: A Simulation Framework for the Analysis of Large-Scale Topologies and Congestion Control Protocols in Data Center Networks.Malek Musleh, Roberto Pearanda, Allister Alemania, Pedro Yebenes Segura, Gene Wu, Jan Zielinski, Krzysztof Raszkowski, Nan Ni, Scott Diesing, Anupama Kurpad, Ram Huggahalli, Curt E. Bruns, Steven Miller, Sujoy Sen
2015HOTIIntel Omni-path Architecture: Enabling Scalable, High Performance Fabrics.Mark S. Birrittella, Mark Debbage, Ram Huggahalli, James Kunz, Tom Lovett, Todd Rimmer, Keith D. Underwood, Robert C. Zak
2010HOTIUnderstanding Power Efficiency of TCP/IP Packet Processing over 10GbE.Guangdeng Liao, Xia Zhu, Steen Larsen, Laxmi N. Bhuyan, Ram Huggahalli
2009HPCACharacterization of Direct Cache Access on multi-core systems and 10GbE.Amit Kumar, Ram Huggahalli, Srihari Makineni
2008HiPCAchieving 10Gbps Network Processing: Are We There Yet?.Priya Govindarajan, Srihari Makineni, Donald Newell, Ravi R. Iyer, Ram Huggahalli, Amit Kumar
2007MICROImpact of Cache Coherence Protocols on the Processing of Network Traffic.Amit Kumar, Ram Huggahalli
2007SBAC-PADArchitectural Breakdown of End-to-End Latency in a TCP/IP Network.Steen Larsen, Parthasarathy Sarangam, Ram Huggahalli
2005ISCADirect Cache Access for High Bandwidth Network I/O.Ram Huggahalli, Ravi R. Iyer, Scott Tetrick
2004MASCOTSASPEN: Towards Effective Simulation of Threads and Engines in Evolving Platforms.Jaideep Moses, Ramesh Illikkal, Ravi R. Iyer, Ram Huggahalli, Donald Newell
1991ICRAA neural network architecture for faster dynamic scheduling in manufacturing systems.Cihan H. Dagli, Ram Huggahalli