Rangharajan Venkatesan
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
25
Venues
9
Active years
2011–2025
Best venue rank
A*
Where they publish
Papers
25 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | DAC | SQ-DM: Accelerating Diffusion Models with Aggressive Quantization and Temporal Sparsity. | Zichen Fan, Steve Dai, Rangharajan Venkatesan, Dennis Sylvester, Brucek Khailany |
| 2024 | ISPASS | Vision Transformer Computation and Resilience for Dynamic Inference. | Kavya Sreedhar, Jason Clemons, Rangharajan Venkatesan, Stephen W. Keckler, Mark Horowitz |
| 2023 | DAC | Efficient Transformer Inference with Statically Structured Sparse Attention. | Steve Dai, Hasan Genc, Rangharajan Venkatesan, Brucek Khailany |
| 2022 | ICML | Optimal Clipping and Magnitude-aware Differentiation for Improved Quantization-aware Training. | Charbel Sakr, Steve Dai, Rangharajan Venkatesan, Brian Zimmer, William J. Dally, Brucek Khailany |
| 2021 | DAC | Softermax: Hardware/Software Co-Design of an Efficient Softmax for Transformers. | Jacob R. Stevens, Rangharajan Venkatesan, Steve Dai, Brucek Khailany, Anand Raghunathan |
| 2021 | ICCAD | IPA: Floorplan-Aware SystemC Interconnect Performance Modeling and Generation for HLS-based SoCs. | Nathaniel Ross Pinckney, Rangharajan Venkatesan, Ben Keller, Brucek Khailany |
| 2019 | ASPLOS | Buffets: An Efficient and Composable Storage Idiom for Explicit Decoupled Data Orchestration. | Michael Pellauer, Yakun Sophia Shao, Jason Clemons, Neal Clayton Crago, Kartik Hegde, Rangharajan Venkatesan, Stephen W. Keckler, Christopher W. Fletcher, Joel S. Emer |
| 2019 | DAC | Analog/Mixed-Signal Hardware Error Modeling for Deep Learning Inference. | Angad S. Rekhi, Brian Zimmer, Nikola Nedovic, Ningxi Liu, Rangharajan Venkatesan, Miaorong Wang, Brucek Khailany, William J. Dally, C. Thomas Gray |
| 2019 | ICCAD | MAGNet: A Modular Accelerator Generator for Neural Networks. | Rangharajan Venkatesan, Yakun Sophia Shao, Miaorong Wang, Jason Clemons, Steve Dai, Matthew Fojtik, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Yanqing Zhang, Brian Zimmer, William J. Dally, Joel S. Emer, Stephen W. Keckler, Brucek Khailany |
| 2019 | ISPASS | Timeloop: A Systematic Approach to DNN Accelerator Evaluation. | Angshuman Parashar, Priyanka Raina, Yakun Sophia Shao, Yu-Hsin Chen, Victor A. Ying, Anurag Mukkara, Rangharajan Venkatesan, Brucek Khailany, Stephen W. Keckler, Joel S. Emer |
| 2019 | MICRO | Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture. | Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler |
| 2018 | DAC | A modular digital VLSI flow for high-productivity SoC design. | Brucek Khailany, Evgeni Khmer, Rangharajan Venkatesan, Jason Clemons, Joel S. Emer, Matthew Fojtik, Alicia Klinefelter, Michael Pellauer, Nathaniel Ross Pinckney, Yakun Sophia Shao, Shreesha Srinath, Christopher Torng, Sam Likun Xi, Yanqing Zhang, Brian Zimmer |
| 2017 | DATE | STAxCache: An approximate, energy efficient STT-MRAM cache. | Ashish Ranjan, Swagath Venkataramani, Zoha Pajouhi, Rangharajan Venkatesan, Kaushik Roy, Anand Raghunathan |
| 2017 | ISCA | SCNN: An Accelerator for Compressed-sparse Convolutional Neural Networks. | Angshuman Parashar, Minsoo Rhu, Anurag Mukkara, Antonio Puglielli, Rangharajan Venkatesan, Brucek Khailany, Joel S. Emer, Stephen W. Keckler, William J. Dally |
| 2016 | DAC | A real-time energy-efficient superpixel hardware accelerator for mobile computer vision applications. | Injoon Hong, Jason Clemons, Rangharajan Venkatesan, Iuri Frosio, Brucek Khailany, Stephen W. Keckler |
| 2015 | DATE | Asymmetric underlapped FinFET based robust SRAM design at 7nm node. | A. Arun Goud, Rangharajan Venkatesan, Anand Raghunathan, Kaushik Roy |
| 2015 | DATE | DyReCTape: a <u>dy</u>namically <u>re</u>configurable <u>c</u>ache using domain wall memory <u>tape</u>s. | Ashish Ranjan, Shankar Ganesh Ramasubramanian, Rangharajan Venkatesan, Vijay S. Pai, Kaushik Roy, Anand Raghunathan |
| 2015 | DATE | Spintastic: <u>spin</u>-based s<u>t</u>och<u>astic</u> logic for energy-efficient computing. | Rangharajan Venkatesan, Swagath Venkataramani, Xuanyao Fong, Kaushik Roy, Anand Raghunathan |
| 2014 | ISCA | STAG: Spintronic-Tape Architecture for GPGPU cache hierarchies. | Rangharajan Venkatesan, Shankar Ganesh Ramasubramanian, Swagath Venkataramani, Kaushik Roy, Anand Raghunathan |
| 2014 | ISLPED | SPINDLE: SPINtronic deep learning engine for large-scale neuromorphic computing. | Shankar Ganesh Ramasubramanian, Rangharajan Venkatesan, Mrigank Sharad, Kaushik Roy, Anand Raghunathan |
| 2013 | DATE | DWM-TAPESTRI - an energy efficient all-spin cache using domain wall shift based writes. | Rangharajan Venkatesan, Mrigank Sharad, Kaushik Roy, Anand Raghunathan |
| 2013 | ISLPED | Multi-level magnetic RAM using domain wall shift for energy-efficient, high-density caches. | Mrigank Sharad, Rangharajan Venkatesan, Anand Raghunathan, Kaushik Roy |
| 2012 | ISLPED | TapeCache: a high density, energy efficient cache based on domain wall memory. | Rangharajan Venkatesan, Vivek Joy Kozhikkottu, Charles Augustine, Arijit Raychowdhury, Kaushik Roy, Anand Raghunathan |
| 2011 | DATE | VESPA: Variability emulation for System-on-Chip performance analysis. | Vivek Joy Kozhikkottu, Rangharajan Venkatesan, Anand Raghunathan, Sujit Dey |
| 2011 | ICCAD | MACACO: Modeling and analysis of circuits for approximate computing. | Rangharajan Venkatesan, Amit Agarwal, Kaushik Roy, Anand Raghunathan |