| 2017 | FPGA | Quality-Time Tradeoffs in Component-Specific Mapping: How to Train Your Dynamically Reconfigurable Array of Gates with Outrageous Network-delays. | Hans Giesen, Raphael Rubin, Benjamin Gojman, Andr DeHon |
| 2016 | FCCM | Continuous Online Self-Monitoring Introspection Circuitry for Timing Repair by Incremental Partial-Reconfiguration (COSMIC TRIP). | Hans Giesen, Benjamin Gojman, Raphael Rubin, Ji Kim, Andr DeHon |
| 2016 | FPGA | Pitfalls and Tradeoffs in Simultaneous, On-Chip FPGA Delay Measurement. | Timothy A. Linscott, Benjamin Gojman, Raphael Rubin, Andr DeHon |
| 2015 | ASPLOS | Architectural Support for Software-Defined Metadata Processing. | Udit Dhawan, Catalin Hritcu, Raphael Rubin, Nikos Vasilakis, Silviu Chiricescu, Jonathan M. Smith, Thomas F. Knight Jr., Benjamin C. Pierce, Andr DeHon |
| 2014 | ISCA | PUMP: a programmable unit for metadata processing. | Udit Dhawan, Nikos Vasilakis, Raphael Rubin, Silviu Chiricescu, Jonathan M. Smith, Thomas F. Knight Jr., Benjamin C. Pierce, Andr DeHon |
| 2012 | FPGA | Limit study of energy & delay benefits of component-specific routing. | Nikil Mehta, Raphael Rubin, Andr DeHon |
| 2011 | FPGA | Timing-driven pathfinder pathology and remediation: quantifying and reducing delay noise in VPR-pathfinder. | Raphael Rubin, Andr DeHon |
| 2009 | FPGA | Choose-your-own-adventure routing: lightweight load-time defect avoidance. | Raphael Rubin, Andr DeHon |
| 2006 | FCCM | GraphStep: A System Architecture for Sparse-Graph Algorithms. | Michael DeLorimier, Nachiket Kapre, Nikil Mehta, Dominic Rizzo, Ian Eslick, Raphael Rubin, Toms E. Uribe, Thomas F. Knight Jr., Andr DeHon |
| 2006 | FCCM | Packet Switched vs. Time Multiplexed FPGA Overlay Networks. | Nachiket Kapre, Nikil Mehta, Michael DeLorimier, Raphael Rubin, Henry Barnor, Michael J. Wilson, Michael G. Wrighton, Andr DeHon |
| 2003 | FPGA | Design of FPGA interconnect for multilevel metalization. | Raphael Rubin, Andr DeHon |