Quality-Time Tradeoffs in Component-Specific Mapping: How to Train Your Dynamically Reconfigurable Array of Gates with Outrageous Network-delays.
Hans Giesen, Raphael Rubin, Benjamin Gojman, Andr DeHon
Browse the full FPGA paper archive.
Hans Giesen, Raphael Rubin, Benjamin Gojman, Andr DeHon
Browse the full FPGA paper archive.