Reetinder P. S. Sidhu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
3
Active years
1999–2008
Best venue rank
B
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2008 | FPL | High-speed regular expression matching engine using multi-character NFA. | Norio Yamagaki, Reetinder P. S. Sidhu, Satoshi Kamiya |
| 2002 | FPL | Efficient Metacomputation Using Self-Reconfiguration. | Reetinder P. S. Sidhu, Viktor K. Prasanna |
| 2001 | FCCM | Fast Regular Expression Matching Using FPGAs. | Reetinder P. S. Sidhu, Viktor K. Prasanna |
| 2000 | FPL | A Self-Reconfigurable Gate Array Architecture. | Reetinder P. S. Sidhu, Sameer Wadhwa, Alessandro Mei, Viktor K. Prasanna |
| 1999 | FPGA | String Natching on Nulticontext FPGAs Using Self-Reconfiguration. | Reetinder P. S. Sidhu, Alessandro Mei, Viktor K. Prasanna |
| 1999 | FPL | Genetic Programming Using Self-Reconfigurable FPGAs. | Reetinder P. S. Sidhu, Alessandro Mei, Viktor K. Prasanna |